linux-kernel - Re: [PATCH RESEND v2 2/2] PCI: qcom: Add X1E80100 PCIe support

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Message-ID: <20240130180040.GA527428@bhelgaas>
Date: Tue, 30 Jan 2024 12:00:40 -0600
From: Bjorn Helgaas <helgaas@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Abel Vesa <abel.vesa@...aro.org>,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konrad.dybcio@...aro.org>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof Wilczyński <kw@...ux.com>,
	Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, linux-pci@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH RESEND v2 2/2] PCI: qcom: Add X1E80100 PCIe support

On Tue, Jan 30, 2024 at 12:25:06PM +0530, Manivannan Sadhasivam wrote:
> On Mon, Jan 29, 2024 at 04:41:20PM +0200, Abel Vesa wrote:
> > Add the compatible and the driver data for X1E80100.
> 
> If you happen to respin the series, please add info about the PCIe controller
> found on this SoC. Like IP version, Gen speed, max. link width etc...

FWIW, I always prefer actual speeds, e.g., "8 GT/s", instead of things
like "Gen3", for the reason mentioned in the spec:

  Terms like "PCIe Gen3" are ambiguous and should be avoided. For
  example, "gen3" could mean (1) compliant with Base 3.0, (2)
  compliant with Base 3.1 (last revision of 3.x), (3) compliant with
  Base 3.0 and supporting 8.0 GT/s, (4) compliant with Base 3.0 or
  later and supporting 8.0 GT/s, ....

Bjorn