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Message-ID: <2qfzbafedurgpsnlbrrfcwed4kij5kbz6txaacp3fy73anfk3g@r75kdg6byw4b>
Date: Wed, 31 Jan 2024 15:04:03 +0200
From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, 
	Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>
Cc: x86@...nel.org, "H. Peter Anvin" <hpa@...or.com>, 
	linux-kernel@...r.kernel.org, Andi Kleen <ak@...ux.intel.com>, Kai Huang <kai.huang@...el.com>, 
	Sean Christopherson <seanjc@...gle.com>
Subject: Re: [PATCHv4] x86/trampoline: Bypass compat mode in
 trampoline_start64() if not needed

On Fri, Jan 26, 2024 at 12:01:01PM +0200, Kirill A. Shutemov wrote:
> The trampoline_start64() vector is used when a secondary CPU starts in
> 64-bit mode. The current implementation directly enters compatibility
> mode. It is necessary to disable paging and re-enable it in the correct
> paging mode: either 4- or 5-level, depending on the configuration.
> 
> The X86S[1] ISA does not support compatibility mode in ring 0, and
> paging cannot be disabled.
> 
> The trampoline_start64() function is reworked to only enter compatibility
> mode if it is necessary to change the paging mode. If the CPU is already
> in the desired paging mode, it will proceed in long mode.
> 
> This change will allow a secondary CPU to boot on an X86S machine as
> long as the CPU is already in the correct paging mode.
> 
> In the future, there will be a mechanism to switch between paging modes
> without disabling paging.
> 
> [1] https://www.intel.com/content/www/us/en/developer/articles/technical/envisioning-future-simplified-architecture.html
> 
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
> Reviewed-by: Andi Kleen <ak@...ux.intel.com>
> Reviewed-by: Kai Huang <kai.huang@...el.com>
> Cc: Sean Christopherson <seanjc@...gle.com>

Any feedback?

-- 
  Kiryl Shutsemau / Kirill A. Shutemov

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