linux-kernel - Re: [PATCH v4 16/18] MIPS: mobileye: eyeq5: add reset properties to UARTs

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Date: Thu, 01 Feb 2024 11:32:42 +0100
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: "Krzysztof Kozlowski" <krzysztof.kozlowski@...aro.org>, "Gregory
 CLEMENT" <gregory.clement@...tlin.com>, "Michael Turquette"
 <mturquette@...libre.com>, "Stephen Boyd" <sboyd@...nel.org>, "Rob Herring"
 <robh+dt@...nel.org>, "Krzysztof Kozlowski"
 <krzysztof.kozlowski+dt@...aro.org>, "Conor Dooley" <conor+dt@...nel.org>,
 "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>, "Linus Walleij"
 <linus.walleij@...aro.org>, Rafał Miłecki
 <rafal@...ecki.pl>, "Philipp Zabel" <p.zabel@...gutronix.de>
Cc: "Vladimir Kondratiev" <vladimir.kondratiev@...ileye.com>,
 <linux-mips@...r.kernel.org>, <linux-clk@...r.kernel.org>,
 <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, "Thomas
 Petazzoni" <thomas.petazzoni@...tlin.com>, "Tawfik Bayouk"
 <tawfik.bayouk@...ileye.com>, <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH v4 16/18] MIPS: mobileye: eyeq5: add reset properties to
 UARTs

Hello,

On Thu Feb 1, 2024 at 10:13 AM CET, Krzysztof Kozlowski wrote:
> On 31/01/2024 17:26, Théo Lebrun wrote:
> > UART nodes have been added to the devicetree by the initial platform
> > support patch series. Add reset properties now that the reset node is
> > declared.
> > 
> > Signed-off-by: Théo Lebrun <theo.lebrun@...tlin.com>
> > ---
> >  arch/mips/boot/dts/mobileye/eyeq5.dtsi | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi
> > index 06e941b0ce10..ece71cafb6ee 100644
> > --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi
> > +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi
> > @@ -78,6 +78,7 @@ uart0: serial@...000 {
> >  			interrupts = <GIC_SHARED 6 IRQ_TYPE_LEVEL_HIGH>;
> >  			clocks  = <&uart_clk>, <&occ_periph>;
> >  			clock-names = "uartclk", "apb_pclk";
> > +			resets = <&reset 0 10>;
>
> You touch the same file. Squash the patch with previous one. It's the
> same logical change to add reset to entire SoC. You don't add half of
> reset, right?

Makes sense. I'll update the commit message with that change.

Thanks,

--
Théo Lebrun, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com