lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ee201484-78b4-4c7a-97ad-e5dea0748b04@broadcom.com>
Date: Mon, 5 Feb 2024 10:06:23 -0800
From: William Zhang <william.zhang@...adcom.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>
Cc: Linux MTD List <linux-mtd@...ts.infradead.org>,
 Linux ARM List <linux-arm-kernel@...ts.infradead.org>,
 Broadcom Kernel List <bcm-kernel-feedback-list@...adcom.com>,
 f.fainelli@...il.com, kursad.oney@...adcom.com, joel.peshkin@...adcom.com,
 anand.gore@...adcom.com, dregan@...l.com, kamal.dasu@...adcom.com,
 tomer.yacoby@...adcom.com, dan.beygelman@...adcom.com,
 devicetree@...r.kernel.org, Brian Norris <computersforpeace@...il.com>,
 linux-kernel@...r.kernel.org, Conor Dooley <conor+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Vignesh Raghavendra <vigneshr@...com>, Richard Weinberger <richard@....at>,
 Kamal Dasu <kdasu.kdev@...il.com>, Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH v4 02/12] dt-bindings: mtd: brcmnand: Add WP pin
 connection property



On 2/5/24 05:32, Miquel Raynal wrote:
> Hi William,
> 
> william.zhang@...adcom.com wrote on Fri,  2 Feb 2024 16:28:23 -0800:
> 
>> Add brcm,wp-not-connected property to have an option for disabling this
>> feature on broadband board design that does not connect WP pin.
>>
>> Signed-off-by: William Zhang <william.zhang@...adcom.com>
>>
>> ---
>>
>> Changes in v4:
>> - Move the WP pin property to this separate patch and change it to
>> boolean type.
>>
>> Changes in v3: None
>> Changes in v2: None
>>
>>   Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml | 8 ++++++++
>>   1 file changed, 8 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> index e54ca08a798a..d0168d55c73e 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> @@ -113,6 +113,14 @@ properties:
>>         earlier versions of this core that include WP
>>       type: boolean
>>   
>> +  brcm,wp-not-connected:
>> +    description:
>> +      Use this property when board design does not connect controller's
>> +      NAND_WPb pin to NAND chip's WP_L pin and disable the write
>> +      protection feature. By default, controller assumes the pin is
>> +      connected and feature is used.
> 
> I would rephrase slightly. What about:
> 
> 	 WP pin is not physically wired to the NAND chip. Write
> 	 protection feature cannot be used.
>   
That's fine with me.  Will update.

>> +    $ref: /schemas/types.yaml#/definitions/flag
>> +
>>   patternProperties:
>>     "^nand@[a-f0-9]$":
>>       type: object
> 
> 
> Thanks,
> Miquèl

Download attachment "smime.p7s" of type "application/pkcs7-signature" (4212 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ