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Message-ID: <dsfne22iebd7mvyyskhpw3rkkfhlxpv32afht456vq3u52axyr@kgkxfzm5vn4c>
Date: Mon, 12 Feb 2024 19:48:37 +0100
From: Sebastian Reichel <sebastian.reichel@...labora.com>
To: Johan Jonker <jbx6244@...dex.com>
Cc: Heiko Stuebner <heiko@...ech.de>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>, linux-rockchip@...ts.infradead.org,
linux-phy@...ts.infradead.org, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Frank Wang <frank.wang@...k-chips.com>, Kever Yang <kever.yang@...k-chips.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, kernel@...labora.com
Subject: Re: [PATCH v1 06/10] arm64: dts: rockchip: add USBDP phys on rk3588
Hi Johan,
On Sun, Feb 11, 2024 at 08:24:36PM +0100, Johan Jonker wrote:
> > + u2phy1: usb2-phy@...0 {
>
> "usb2phy@[0-9a-f]+$":
Interesting. I would have expected that to pop up in dtbs_check, but
it does not for some reason. I will fix it for all usb2phy instances
in rk3588.
> > + compatible = "rockchip,rk3588-usb2phy";
> > + reg = <0x4000 0x10>;
> > + interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>;
>
> > + resets = <&cru SRST_OTGPHY_U3_1>, <&cru SRST_P_USB2PHY_U3_1_GRF0>;
> > + reset-names = "phy", "apb";
> > + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
> > + clock-names = "phyclk";
> > + clock-output-names = "usb480m_phy1";
> > + #clock-cells = <0>;
>
> Align with the (new) documentation
> about property ordering.
>
> > + status = "disabled";
> > +
> > + u2phy1_otg: otg-port {
> > + #phy-cells = <0>;
> > + status = "disabled";
> > + };
> > + };
> > + };
The above follows everything from [0], which does not specify an
order for the "standard/common properties". For those this follows
the order of existing usb2phy nodes. Did I miss any other new
Documentation?
[0] https://www.kernel.org/doc/html/next/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node
-- Sebastian
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