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Date: Mon, 12 Feb 2024 20:17:31 +0000
From: Conor Dooley <conor@...nel.org>
To: Miguel Ojeda <miguel.ojeda.sandonis@...il.com>
Cc: Ramon de C Valle <rcvalle@...gle.com>, Trevor Gross <tmgross@...ch.edu>,
	Conor Dooley <conor.dooley@...rochip.com>,
	linux-riscv@...ts.infradead.org, Miguel Ojeda <ojeda@...nel.org>,
	Alex Gaynor <alex.gaynor@...il.com>,
	Wedson Almeida Filho <wedsonaf@...il.com>,
	Boqun Feng <boqun.feng@...il.com>, Gary Guo <gary@...yguo.net>,
	Björn Roy Baron <bjorn3_gh@...tonmail.com>,
	Jonathan Corbet <corbet@....net>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Nathan Chancellor <nathan@...nel.org>,
	Nick Desaulniers <ndesaulniers@...gle.com>,
	Tom Rix <trix@...hat.com>, rust-for-linux@...r.kernel.org,
	linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
	llvm@...ts.linux.dev, Matthew Maurer <mmaurer@...gle.com>,
	Sami Tolvanen <samitolvanen@...gle.com>
Subject: Re: [PATCH v1 0/2] RISC-V: enable rust

On Mon, Feb 12, 2024 at 08:11:21PM +0100, Miguel Ojeda wrote:
> On Mon, Feb 12, 2024 at 8:02 PM Ramon de C Valle <rcvalle@...gle.com> wrote:
> >
> > Sorry for the late reply. Sami might be the best person to answer this, but KCFI (not CFI) tests are lowered by passes that are architecture specific (see https://reviews.llvm.org/D119296), so we'd need to add support for RISC-V. There is no additional work required in the Rust compiler besides enabling it for the new target.
> 
> Thanks a lot Ramon!
> 
> Then for RISC-V let's go for the `depends on` for the moment, and we
> can remove when the support lands for RISC-V (ideally when someone has
> managed to boot it at least under some configuration).

If all you want is a boot under some configuration, that's not
difficult. After all, I found the original issue by booting a kernel
with CFI_CLANG enabled on the C side...

> There is no additional work required in the Rust compiler besides enabling it for the new target.

This is not super clear though, it says "in the Rust compiler", not "in
the kernel's buildsystem".

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