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Message-Id: <20240210-topic-1v-v1-5-fda0db38e29b@linaro.org>
Date: Mon, 12 Feb 2024 14:10:13 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: James Schulman <james.schulman@...rus.com>, 
 David Rhodes <david.rhodes@...rus.com>, 
 Richard Fitzgerald <rf@...nsource.cirrus.com>, 
 Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>, 
 Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Ricardo Rivera-Matos <rriveram@...nsource.cirrus.com>, 
 Bjorn Andersson <andersson@...nel.org>, Abel Vesa <abel.vesa@...aro.org>, 
 Sai Prakash Ranjan <quic_saipraka@...cinc.com>, 
 Neil Armstrong <neil.armstrong@...aro.org>, 
 Kees Cook <keescook@...omium.org>, Tony Luck <tony.luck@...el.com>, 
 "Guilherme G. Piccoli" <gpiccoli@...lia.com>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>, 
 alsa-devel@...a-project.org, patches@...nsource.cirrus.com, 
 linux-sound@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org, 
 linux-hardening@...r.kernel.org, Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH 5/7] arm64: dts: qcom: sm8550: Add missing DWC3 quirks

As expected, Qualcomm DWC3 implementation come with a sizable number
of quirks. Make sure to account for all of them.

Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 868d48b85555..925e56317fb0 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3193,12 +3193,20 @@ usb_1_dwc3: usb@...0000 {
 				reg = <0x0 0x0a600000 0x0 0xcd00>;
 				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 				iommus = <&apps_smmu 0x40 0x0>;
-				snps,dis_u2_susphy_quirk;
-				snps,dis_enblslpm_quirk;
-				snps,usb3_lpm_capable;
 				phys = <&usb_1_hsphy>,
 				       <&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>;
 				phy-names = "usb2-phy", "usb3-phy";
+				snps,hird-threshold = /bits/ 8 <0x0>;
+				snps,usb2-gadget-lpm-disable;
+				snps,dis_u2_susphy_quirk;
+				snps,dis_enblslpm_quirk;
+				snps,dis-u1-entry-quirk;
+				snps,dis-u2-entry-quirk;
+				snps,is-utmi-l1-suspend;
+				snps,usb3_lpm_capable;
+				snps,usb2-lpm-disable;
+				snps,has-lpm-erratum;
+				tx-fifo-resize;
 
 				ports {
 					#address-cells = <1>;

-- 
2.43.1


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