[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240210-topic-1v-v1-6-fda0db38e29b@linaro.org>
Date: Mon, 12 Feb 2024 14:10:14 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: James Schulman <james.schulman@...rus.com>,
David Rhodes <david.rhodes@...rus.com>,
Richard Fitzgerald <rf@...nsource.cirrus.com>,
Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Ricardo Rivera-Matos <rriveram@...nsource.cirrus.com>,
Bjorn Andersson <andersson@...nel.org>, Abel Vesa <abel.vesa@...aro.org>,
Sai Prakash Ranjan <quic_saipraka@...cinc.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Kees Cook <keescook@...omium.org>, Tony Luck <tony.luck@...el.com>,
"Guilherme G. Piccoli" <gpiccoli@...lia.com>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>,
alsa-devel@...a-project.org, patches@...nsource.cirrus.com,
linux-sound@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-hardening@...r.kernel.org, Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH 6/7] arm64: dts: qcom: sm8550: Mark DWC3 as dma-coherent
In a fairly new development, Qualcomm somehow made the DWC3 block
cache-coherent. Annotate that.
Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 925e56317fb0..e845c8814fb9 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3207,6 +3207,7 @@ usb_1_dwc3: usb@...0000 {
snps,usb2-lpm-disable;
snps,has-lpm-erratum;
tx-fifo-resize;
+ dma-coherent;
ports {
#address-cells = <1>;
--
2.43.1
Powered by blists - more mailing lists