linux-kernel - Re: [net-next PATCH] net: phy: aquantia: add AQR111 and AQR111B0 PHY ID

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Date: Tue, 13 Feb 2024 16:15:43 +0100
From: Christian Marangi <ansuelsmth@...il.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	"Russell King (Oracle)" <rmk+kernel@...linux.org.uk>,
	Robert Marko <robimarko@...il.com>, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [net-next PATCH] net: phy: aquantia: add AQR111 and AQR111B0 PHY
 ID

On Tue, Feb 13, 2024 at 04:10:01PM +0100, Andrew Lunn wrote:
> On Tue, Feb 13, 2024 at 03:18:09PM +0100, Christian Marangi wrote:
> > On Tue, Feb 13, 2024 at 03:09:57PM +0100, Andrew Lunn wrote:
> > > On Tue, Feb 13, 2024 at 02:35:51PM +0100, Christian Marangi wrote:
> > > > Add Aquantia AQR111 and AQR111B0 PHY ID. These PHY advertise 10G speed
> > > > but actually supports up to 5G speed, hence some manual fixup is needed.
> > > 
> > > Any chance this is a "golden screwdriver" situation? The chip really
> > > can do 10G, but the firmware is supposed to limit it to 5G? This is
> > > just a firmware "bug"?
> > >
> > 
> > >From [1] the PHY can support up to 5G so yes it is a firmware bug. I can
> > try searching for some regs to fix the wrong provision values if really
> > needed.
> > 
> > [1] https://www.marvell.com/content/dam/marvell/en/public-collateral/transceivers/marvell-phys-transceivers-aqrate-gen3-product-brief-2019-09.pdf
> 
> I think you missed the meaning of golden screwdriver.
> 
> https://www.urbandictionary.com/define.php?term=Golden%20Screwdriver
> 
> It could be that the silicon can do 10G, but marvell are selling it as
> a 5G device, with firmware limiting it to 5G. And that firmware
> limitation has a bug, so some of the 10G functionality is leaking
> through.

Oh! Yep I didn't know the meaning of Golden Screwdriver.

With the amount of things we are noticing on these PHY it can be
anything from Marvell itself, from OEM messing up with the Provision to
a buf in the FW itself...

(example that thing that Asus made on the other patch where they HW
disable the port by default, that is against any default spec of the
documentation)

(or also a patch that I still have to submit where some manual fixup are
needed on aqr112 since the FW mess with the SERDES startup regs (again
probably OEM not correctly provisioning the FW))

> 
> Anyway, you change looks O.K.
> 
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
> 

Thanks for the Reviewed-by tag!

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