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Message-ID: <Zc4y7Tj2K2pTQ4HY@smile.fi.intel.com>
Date: Thu, 15 Feb 2024 17:51:09 +0200
From: Andy Shevchenko <andy@...nel.org>
To: Thomas Richard <thomas.richard@...tlin.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Tony Lindgren <tony@...mide.com>,
Haojian Zhuang <haojian.zhuang@...aro.org>,
Vignesh R <vigneshr@...com>, Aaro Koskinen <aaro.koskinen@....fi>,
Janusz Krzysztofik <jmkrzyszt@...il.com>,
Andi Shyti <andi.shyti@...nel.org>, Peter Rosin <peda@...ntia.se>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-omap@...r.kernel.org,
linux-i2c@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-pci@...r.kernel.org, gregory.clement@...tlin.com,
theo.lebrun@...tlin.com, thomas.petazzoni@...tlin.com,
u-kumar1@...com
Subject: Re: [PATCH v3 18/18] PCI: j721e: add suspend and resume support
On Thu, Feb 15, 2024 at 04:18:03PM +0100, Thomas Richard wrote:
> From: Théo Lebrun <theo.lebrun@...tlin.com>
>
> Add suspend and resume support. Only the rc mode is supported.
>
> During the suspend stage PERST# is asserted, then deasserted during the
> resume stage.
..
> +#include <linux/clk-provider.h>
> #include <linux/clk.h>
> #include <linux/delay.h>
> #include <linux/gpio/consumer.h>
> @@ -18,10 +19,13 @@
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/regmap.h>
> +#include <linux/container_of.h>
Unordered.
..
> + ret = j721e_pcie_ctrl_init(pcie);
> + if (ret < 0) {
> + dev_err(dev, "j721e_pcie_ctrl_init failed\n");
Is there any guarantee this won't spam logs?
> + return ret;
> + }
..
> + /*
> + * This is not called explicitly in the probe, it is called by
> + * cdns_pcie_init_phy.
cdns_pcie_init_phy()
> + */
> + ret = cdns_pcie_enable_phy(pcie->cdns_pcie);
> + if (ret < 0) {
> + dev_err(dev, "cdns_pcie_enable_phy failed\n");
> + return -ENODEV;
A potential log spammer?
> + }
> + if (pcie->mode == PCI_MODE_RC) {
> + struct cdns_pcie_rc *rc = cdns_pcie_to_rc(cdns_pcie);
> +
> + ret = clk_prepare_enable(pcie->refclk);
> + if (ret < 0) {
> + dev_err(dev, "clk_prepare_enable failed\n");
Ditto.
> + return -ENODEV;
Why is the error code shadowed?
> + }
..
> + if (pcie->reset_gpio) {
> + usleep_range(100, 200);
fsleep()
> + gpiod_set_value_cansleep(pcie->reset_gpio, 1);
> + }
> + ret = cdns_pcie_host_link_setup(rc);
> + if (ret < 0) {
> + clk_disable_unprepare(pcie->refclk);
> + return ret;
> + }
> +
> + /*
> + * Reset internal status of BARs to force reinitialization in
> + * cdns_pcie_host_init().
> + */
> + for (enum cdns_pcie_rp_bar bar = RP_BAR0; bar <= RP_NO_BAR; bar++)
> + rc->avail_ib_bar[bar] = true;
> +
> + ret = cdns_pcie_host_init(rc);
> + if (ret)
No clock disabling?
> + return ret;
> + }
--
With Best Regards,
Andy Shevchenko
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