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Message-ID: <ed59671f-6e0b-45a2-bae7-38f7b4b7e625@amd.com>
Date: Fri, 16 Feb 2024 10:42:29 +0100
From: Michal Simek <michal.simek@....com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linux-kernel@...r.kernel.org, monstr@...str.eu, michal.simek@...inx.com,
git@...inx.com
Cc: Alexandre Belloni <alexandre.belloni@...tlin.com>,
Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/ZYNQ ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"open list:REAL TIME CLOCK (RTC) SUBSYSTEM" <linux-rtc@...r.kernel.org>
Subject: Re: [PATCH] dt-bindings: rtc: zynqmp: Describe power-domains property
On 2/16/24 10:19, Krzysztof Kozlowski wrote:
> On 16/02/2024 09:51, Michal Simek wrote:
>> RTC has its own power domain on Xilinx Versal SOC that's why describe it as
>> optional property.
>>
>> Signed-off-by: Michal Simek <michal.simek@....com>
>> ---
>>
>> Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>
> But Versal is not described in this binding, is it? I see only one
> compatible.
It is the same IP only as is on zynqmp with own power rail.
Pretty much with different firmware interface on zynqmp you can describe it too
(and doesn't really matter if it is separated in HW or common for more IPs).
Thanks,
Michal
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