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Message-ID: <321bdb3d-d377-4044-b8c9-02f7e1af1b6a@linaro.org>
Date: Sat, 17 Feb 2024 15:27:21 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Markus Schneider-Pargmann <msp@...libre.com>,
Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Vignesh Raghavendra <vigneshr@...com>,
Tero Kristo <kristo@...nel.org>, "Rafael J . Wysocki" <rafael@...nel.org>
Cc: Andrew Davis <afd@...com>, Dhruva Gole <d-gole@...com>,
linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: cpufreq: Add nvmem-cells for chip
information
On 15/02/2024 09:24, Krzysztof Kozlowski wrote:
> On 06/02/2024 15:57, Markus Schneider-Pargmann wrote:
>> Add nvmem-cells to describe chip information like chipvariant and
>> chipspeed. If nvmem-cells are used, the syscon property is not necessary
>> anymore.
>>
>> Signed-off-by: Markus Schneider-Pargmann <msp@...libre.com>
>> Acked-by: Andrew Davis <afd@...com>
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
NAK
And unreviewed. Please carry on:
Nacked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
I found older discussion with Rob, who pointed out that one device
cannot have entirely different programming models, so this patchset has
the same errors. None of the previous issues were fixed here.
Best regards,
Krzysztof
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