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Message-ID: <20240218-struggle-grumble-43efdfb9515d@spud>
Date: Sun, 18 Feb 2024 12:47:39 +0000
From: Conor Dooley <conor@...nel.org>
To: Atish Patra <atishp@...osinc.com>
Cc: linux-kernel@...r.kernel.org, Adrian Hunter <adrian.hunter@...el.com>,
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
	Alexandre Ghiti <alexghiti@...osinc.com>,
	Andrew Jones <ajones@...tanamicro.com>,
	Anup Patel <anup@...infault.org>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	Atish Patra <atishp@...shpatra.org>,
	Christian Brauner <brauner@...nel.org>,
	Clément Léger <cleger@...osinc.com>,
	devicetree@...r.kernel.org, Evan Green <evan@...osinc.com>,
	Guo Ren <guoren@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
	Ian Rogers <irogers@...gle.com>, Ingo Molnar <mingo@...hat.com>,
	James Clark <james.clark@....com>,
	Jing Zhang <renyu.zj@...ux.alibaba.com>,
	Jiri Olsa <jolsa@...nel.org>,
	Ji Sheng Teoh <jisheng.teoh@...rfivetech.com>,
	John Garry <john.g.garry@...cle.com>,
	Jonathan Corbet <corbet@....net>,
	Kan Liang <kan.liang@...ux.intel.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	kvm-riscv@...ts.infradead.org, kvm@...r.kernel.org,
	Ley Foon Tan <leyfoon.tan@...rfivetech.com>,
	linux-doc@...r.kernel.org, linux-perf-users@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	Mark Rutland <mark.rutland@....com>,
	Namhyung Kim <namhyung@...nel.org>,
	Palmer Dabbelt <palmer@...belt.com>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Rob Herring <robh+dt@...nel.org>,
	Samuel Holland <samuel.holland@...ive.com>,
	Weilin Wang <weilin.wang@...el.com>, Will Deacon <will@...nel.org>,
	kaiwenxue1@...il.com, Yang Jihong <yangjihong1@...wei.com>
Subject: Re: [PATCH RFC 04/20] dt-bindings: riscv: add Sxcsrind ISA extension
 description

On Fri, Feb 16, 2024 at 04:57:22PM -0800, Atish Patra wrote:
> Add the S[m|s]csrind ISA extension description.
> 
> Signed-off-by: Atish Patra <atishp@...osinc.com>
> ---
>  .../devicetree/bindings/riscv/extensions.yaml      | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
> index 63d81dc895e5..77a9f867e36b 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -134,6 +134,20 @@ properties:
>              added by other RISC-V extensions in H/S/VS/U/VU modes and as
>              ratified at commit a28bfae (Ratified (#7)) of riscv-state-enable.
>  
> +	- const: smcsrind
> +          description: |
> +            The standard Smcsrind supervisor-level extension extends the

The indentation here looks weird.

> +	    indirect CSR access mechanism defined by the Smaia extension. This
> +	    extension allows other ISA extension to use indirect CSR access
> +	    mechanism in M-mode.

For this, and the other patches in the series, I want a reference to the
frozen/ratified point for these extensions. See the rest of this file
for examples.

Cheers,
Conor.

> +
> +	- const: sscsrind
> +          description: |
> +            The standard Sscsrind supervisor-level extension extends the
> +	    indirect CSR access mechanism defined by the Ssaia extension. This
> +	    extension allows other ISA extension to use indirect CSR access
> +	    mechanism in S-mode.
> +
>          - const: ssaia
>            description: |
>              The standard Ssaia supervisor-level extension for the advanced
> -- 
> 2.34.1
> 

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