linux-kernel - Re: [PATCH] arm64: ls1046ardb: Replace XGMII with 10GBASE-R phy mode

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Date: Wed, 21 Feb 2024 01:49:30 +0200
From: Vladimir Oltean <vladimir.oltean@....com>
To: Sean Anderson <sean.anderson@...o.com>
Cc: zachary.goldstein@...current-rt.com, Shawn Guo <shawnguo@...nel.org>,
	Madalin Bucur <madalin.bucur@....com>, Li Yang <leoyang.li@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org
Subject: Re: [PATCH] arm64: ls1046ardb: Replace XGMII with 10GBASE-R phy mode

On Wed, Feb 21, 2024 at 01:45:26AM +0200, Vladimir Oltean wrote:
> On Tue, Feb 20, 2024 at 06:17:02PM -0500, Sean Anderson wrote:
> > On 2/20/24 18:06, Vladimir Oltean wrote:
> > > So how did the other Layerscape devices with the same SerDes, PCS and
> > > mEMAC manage to get by and support QSGMII without listing all possible
> > > PCSes in pcs-handle-names? :-/ DPAA2 has the exact same situation with
> > > the QSGMII PCS situated on the internal bus of another DPMAC.
> > 
> > I'm not familiar with them.
> 
> Take the LS1088A-RDB.

Ah, wait a minute, why am I explaining the LS1088A-RDB to you? You've
submitted patches on its SerDes/PCS integration, you even said you
tested the QSGMII ports:
https://lore.kernel.org/linux-arm-kernel/20230321201313.2507539-14-sean.anderson@seco.com/