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Message-ID: <877civefa5.ffs@tglx>
Date: Fri, 23 Feb 2024 09:49:38 +0100
From: Thomas Gleixner <tglx@...utronix.de>
To: Yu Chien Peter Lin <peterlin@...estech.com>, acme@...nel.org,
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Cc: Randolph <randolph@...estech.com>
Subject: Re: [PATCH v9 03/10] irqchip/riscv-intc: Introduce Andes hart-level
interrupt controller
On Thu, Feb 22 2024 at 22:36, Thomas Gleixner wrote:
> Palmer, feel free to take this through the riscv tree. I have no other
> changes pending against that driver.
Aargh. Spoken too early. This conflicts with Anups AIA series.
https://lore.kernel.org/all/20240222094006.1030709-1-apatel@ventanamicro.com
So I rather take the pile through my tree and deal with the conflicts
localy than inflicting it on next.
Palmer?
Thanks,
tglx
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