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Message-ID: <ae4c477e-b61f-4816-972a-7e94c9625905@intel.com>
Date: Tue, 27 Feb 2024 10:02:51 +0800
From: Yin Fengwei <fengwei.yin@...el.com>
To: Dave Hansen <dave.hansen@...el.com>, Paolo Bonzini <pbonzini@...hat.com>
CC: <linux-kernel@...r.kernel.org>, <kvm@...r.kernel.org>, Zixi Chen
<zixchen@...hat.com>, Adam Dunlap <acdunlap@...gle.com>, "Kirill A .
Shutemov" <kirill.shutemov@...ux.intel.com>, Xiaoyao Li
<xiaoyao.li@...el.com>, Kai Huang <kai.huang@...el.com>, Dave Hansen
<dave.hansen@...ux.intel.com>, Thomas Gleixner <tglx@...utronix.de>, "Ingo
Molnar" <mingo@...nel.org>, <x86@...nel.org>, <stable@...r.kernel.org>
Subject: Re: [PATCH v2 0/2] x86/cpu: fix invalid MTRR mask values for SEV or
TME
On 2/27/24 00:21, Dave Hansen wrote:
> On 2/25/24 17:57, Yin Fengwei wrote:
>> On 2/23/24 02:08, Paolo Bonzini wrote:
>>> On Thu, Feb 22, 2024 at 7:07 PM Dave Hansen <dave.hansen@...el.com> wrote:
>>>>> Ping, in the end are we applying these patches for either 6.8 or 6.9?
>>>> Let me poke at them and see if we can stick them in x86/urgent early
>>>> next week. They do fix an actual bug that's biting people, right?
>>> Yes, I have gotten reports of {Sapphire,Emerald} Rapids machines that
>>> don't boot at all without either these patches or
>>> "disable_mtrr_cleanup".
>> We tried platform other than Sapphire and Emerald. This patchset can fix
>> boot issues on that platform also.
>
> Fengwei, could you also test this series on the troublesome hardware,
> please?
Sure. I will try it on my env. I just didn't connected your patchset to this
boot issue. :(.
Regards
Yin, Fengwei
>
>> https://lore.kernel.org/all/20240222183926.517AFCD2@davehans-spike.ostc.intel.com/
>
> If it _also_ fixes the problem, it'll be a strong indication that it's
> the right long-term approach.
>
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