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Message-ID: <3807c397-2eef-4f1d-ae85-4259f061f08e@intel.com>
Date: Mon, 26 Feb 2024 08:21:23 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Yin Fengwei <fengwei.yin@...el.com>, Paolo Bonzini <pbonzini@...hat.com>
Cc: linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
Zixi Chen <zixchen@...hat.com>, Adam Dunlap <acdunlap@...gle.com>,
"Kirill A . Shutemov" <kirill.shutemov@...ux.intel.com>,
Xiaoyao Li <xiaoyao.li@...el.com>, Kai Huang <kai.huang@...el.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...nel.org>,
x86@...nel.org, stable@...r.kernel.org
Subject: Re: [PATCH v2 0/2] x86/cpu: fix invalid MTRR mask values for SEV or
TME
On 2/25/24 17:57, Yin Fengwei wrote:
> On 2/23/24 02:08, Paolo Bonzini wrote:
>> On Thu, Feb 22, 2024 at 7:07 PM Dave Hansen <dave.hansen@...el.com> wrote:
>>>> Ping, in the end are we applying these patches for either 6.8 or 6.9?
>>> Let me poke at them and see if we can stick them in x86/urgent early
>>> next week. They do fix an actual bug that's biting people, right?
>> Yes, I have gotten reports of {Sapphire,Emerald} Rapids machines that
>> don't boot at all without either these patches or
>> "disable_mtrr_cleanup".
> We tried platform other than Sapphire and Emerald. This patchset can fix
> boot issues on that platform also.
Fengwei, could you also test this series on the troublesome hardware,
please?
> https://lore.kernel.org/all/20240222183926.517AFCD2@davehans-spike.ostc.intel.com/
If it _also_ fixes the problem, it'll be a strong indication that it's
the right long-term approach.
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