linux-kernel - Re: [PATCH v15 15/23] PCI: microchip: Add event irqchip field to host port and add PLDA irqchip

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Message-ID:
 <SHXPR01MB0863C64BC0B48707C5FF99A5E659A@SHXPR01MB0863.CHNPR01.prod.partner.outlook.cn>
Date: Tue, 27 Feb 2024 01:10:48 +0000
From: Minda Chen <minda.chen@...rfivetech.com>
To: Aurelien Jarno <aurelien@...el32.net>
CC: David Abdurachmanov <david.abdurachmanov@...il.com>, Conor Dooley
	<conor@...nel.org>, Krzysztof Wilczyński <kw@...ux.com>,
	Rob Herring <robh+dt@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>, Thomas Gleixner
	<tglx@...utronix.de>, Daire McNamara <daire.mcnamara@...rochip.com>, Emil
 Renner Berthing <emil.renner.berthing@...onical.com>, Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-riscv@...ts.infradead.org"
	<linux-riscv@...ts.infradead.org>, "linux-pci@...r.kernel.org"
	<linux-pci@...r.kernel.org>, Paul Walmsley <paul.walmsley@...ive.com>, Palmer
 Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, Philipp
 Zabel <p.zabel@...gutronix.de>, Mason Huo <mason.huo@...rfivetech.com>,
	Leyfoon Tan <leyfoon.tan@...rfivetech.com>, Kevin Xie
	<kevin.xie@...rfivetech.com>
Subject: Re: [PATCH v15 15/23] PCI: microchip: Add event irqchip field to host
 port and add PLDA irqchip


> 
> Hi,
> 
> On 2024-02-21 10:10, Minda Chen wrote:
> >
> >
> > >
> > > On Tue, Feb 20, 2024 at 1:02 PM Minda Chen
> > > <minda.chen@...rfivetech.com>
> > > wrote:
> > > >
> > > >
> > > > >
> > > > > As PLDA dts binding doc(Documentation/devicetree/bindings/pci/
> > > > > plda,xpressrich3-axi-common.yaml) showed, PLDA PCIe contains an
> > > > > interrupt controller.
> > > > >
> > > > > Microchip PolarFire PCIE event IRQs includes PLDA interrupts and
> > > > > Polarfire their own interrupts. The interrupt irqchip ops
> > > > > includes ack/mask/unmask interrupt ops, which will write correct
> registers.
> > > > > Microchip Polarfire PCIe additional interrupts require to write
> > > > > Polarfire SoC self-defined registers. So Microchip PCIe event
> > > > > irqchip ops can
> > > not be re-used.
> > > > >
> > > > > To support PLDA its own event IRQ process, implements PLDA
> > > > > irqchip ops and add event irqchip field to struct pcie_plda_rp.
> > > > >
> > > > > Signed-off-by: Minda Chen <minda.chen@...rfivetech.com>
> > > > > Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> > > > > ---
> > > > >  .../pci/controller/plda/pcie-microchip-host.c | 66
> ++++++++++++++++++-
> > > > >  drivers/pci/controller/plda/pcie-plda.h       |  3 +
> > > > >  2 files changed, 68 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c
> > > > > b/drivers/pci/controller/plda/pcie-microchip-host.c
> > > > > index b3df373a2141..beaf5c27da84 100644
> > > > > --- a/drivers/pci/controller/plda/pcie-microchip-host.c
> > > > > +++ b/drivers/pci/controller/plda/pcie-microchip-host.c
> > > > > @@ -770,6 +770,64 @@ static struct irq_chip mc_event_irq_chip = {
> > > > >       .irq_unmask = mc_unmask_event_irq,  };
> > > > >
> > > > Hi Thomas
> > > >   I think this patch code it is easy to review. If you busy, Could
> > > > you let other IRQ maintainer review? Thanks.
> > > >
> > > > Hi Lorenzo, Bjorn and Krzysztof
> > >
> > > Hi Minda,
> > >
> > > This patchset seems to have broken threading (lore, mailman). I have
> > > seen other folks on IRC mentioning that too.
> > >
> > > I am not sure if that requires re-sending, but let's wait for others to
> comment.
> > >
> > > Cheers,
> > > david
> > >
> > Do you mean the auto test error in linux-riscv?
> > I can see that. But In v14 resend version, There is no error. Version
> > 15 just add a new patch. Other no change. It is very strange.
> > If not this error, I will waiting others comment.
> 
> V15 is wrongly threaded:
> - Patch 2 has no In-Reply-To / In-Reply-To headers
> - Patch 3 to 13 reference patch 2 instead of the cover letter
> - Patch 14 has no In-Reply-To / In-Reply-To headers
> - Patch 15 references patch 14 instead of the cover letter
> - Patch 16 has no In-Reply-To / In-Reply-To headers
> - Patch 17 to 23 reference patch 17 instead of the cover letter
> 
> Said otherwise, the patches appears as (sorry for the long lines):
> 
> [PATCH v15 00/23] Refactoring Microchip PCIe driver and add StarFive PCIe
> └─>[PATCH v15 01/23] dt-bindings: PCI: Add PLDA XpressRICH PCIe host
> common properties [PATCH v15 02/23] PCI: microchip: Move
> pcie-microchip-host.c to plda directory ├─>[PATCH v15 03/23] PCI: microchip:
> Move PLDA IP register macros to pcie-plda.h ├─>[PATCH v15 04/23] PCI:
> microchip: Add bridge_addr field to struct mc_pcie ├─>[PATCH v15 05/23] PCI:
> microchip: Rename two PCIe data structures ├─>[PATCH v15 06/23] PCI:
> microchip: Move PCIe host data structures to plda-pcie.h ├─>[PATCH v15 07/23]
> PCI: microchip: Rename two setup functions ├─>[PATCH v15 08/23] PCI:
> microchip: Change the argument of plda_pcie_setup_iomems() ├─>[PATCH v15
> 09/23] PCI: microchip: Move setup functions to pcie-plda-host.c ├─>[PATCH v15
> 10/23] PCI: microchip: Rename interrupt related functions ├─>[PATCH v15
> 11/23] PCI: microchip: Add num_events field to struct plda_pcie_rp ├─>[PATCH
> v15 12/23] PCI: microchip: Add request_event_irq() callback function
> └─>[PATCH v15 13/23] PCI: microchip: Add INTx and MSI event num to struct
> plda_event [PATCH v15 14/23] PCI: microchip: Add get_events() callback and
> add PLDA get_event() └─>[PATCH v15 15/23] PCI: microchip: Add event irqchip
> field to host port and add PLDA irqchip [PATCH v15 16/23] PCI: microchip: Move
> IRQ functions to pcie-plda-host.c ├─>[PATCH v15 17/23] PCI: plda: Add event
> bitmap field to struct plda_pcie_rp ├─>[PATCH v15 18/23] PCI: plda: Add host
> init/deinit and map bus functions ├─>[PATCH v15 19/23] dt-bindings: PCI: Add
> StarFive JH7110 PCIe controller ├─>[PATCH v15 20/23] PCI: Add
> PCIE_RESET_CONFIG_DEVICE_WAIT_MS waiting time value ├─>[PATCH v15
> 21/23] PCI: starfive: Add JH7110 PCIe controller ├─>[PATCH v15 22/23] PCI:
> starfive: Offload the NVMe timeout workaround to host drivers.
> └─>[PATCH v15 23/23] riscv: dts: starfive: add PCIe dts configuration for
> JH7110
> 
> I *think* it is the reason why some tools are not able to consider all the patches
> as a single patchset.
> 
> Regards
> Aurelien
> 
> --
> Aurelien Jarno                          GPG: 4096R/1DDD8C9B
> aurelien@...el32.net                     http://aurel32.net

I know what the reason is . I have sent the patches with different e-mails receivers. 
I am sorry about it . I will resend this today.