lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Thu, 29 Feb 2024 12:45:46 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Arturas Moskvinas <arturas.moskvinas@...il.com>
Cc: linus.walleij@...aro.org, brgl@...ev.pl, u.kleine-koenig@...gutronix.de,
	linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] gpio: 74x164: Enable output pins after registers are
 reset

On Thu, Feb 29, 2024 at 10:45:56AM +0200, Arturas Moskvinas wrote:
> Chip outputs are enabled[1] before actual reset is performed[2] which might
> cause pin output value to flip flop if previous pin value was set to 1 in chip.
> Change fixes that behavior by making sure chip is fully reset before all outputs
> are enabled.
> 
> Flip-flop can be noticed when module is removed and inserted again and one of
> the pins was changed to 1 before removal. 100 microsecond flipping is
> noticeable on oscilloscope (100khz SPI bus).
> 
> For a properly reset chip - output is enabled around 100 microseconds (on 100khz
> SPI bus) later during probing process hence should be irrelevant behavioral
> change.

> [1] - https://elixir.bootlin.com/linux/v6.7.4/source/drivers/gpio/gpio-74x164.c#L130
> [2] - https://elixir.bootlin.com/linux/v6.7.4/source/drivers/gpio/gpio-74x164.c#L150

Please, convert these to be Link tags, so

at the end it will look like

Fixes:
Link: URL1 [1]
Link: URL2 [2]
Signed-off-by:

-- 
With Best Regards,
Andy Shevchenko



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ