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Message-ID: <22e2cf1b-9560-4f4b-b08b-a112e8e272a8@collabora.com>
Date: Fri, 1 Mar 2024 09:50:31 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Nícolas F. R. A. Prado <nfraprado@...labora.com>,
 Matthias Brugger <matthias.bgg@...il.com>
Cc: Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
 Tinghan Shen <tinghan.shen@...iatek.com>,
 "Jason-JH.Lin" <jason-jh.lin@...iatek.com>,
 "Nancy.Lin" <nancy.lin@...iatek.com>, kernel@...labora.com,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH 2/4] arm64: dts: mediatek: mt8195: Add missing
 gce-client-reg to vpp/vdosys

Il 29/02/24 20:44, Nícolas F. R. A. Prado ha scritto:
> Add the missing mediatek,gce-client-reg property to the vppsys and
> vdosys nodes to allow them to use the GCE. This prevents the "can't
> parse gce-client-reg property" error from being printed and should
> result in better performance.
> 
> Fixes: 6aa5b46d1755 ("arm64: dts: mt8195: Add vdosys and vppsys clock nodes")
> Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>

Can you please squash patches 2,3,4 in a single one?

It doesn't make a lot of sense to have them separated in this case, only
generates commit noise for no practical reason imo.

arm64: dts: mediatek: mt8195: Add missing gce-client-reg to vpp/vdo/mutex

Thanks,
Angelo

> ---
>   arch/arm64/boot/dts/mediatek/mt8195.dtsi | 3 +++
>   1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index ea6dc220e1cc..f2912e1a0e49 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -2028,6 +2028,7 @@ vppsys0: syscon@...00000 {
>   			compatible = "mediatek,mt8195-vppsys0", "syscon";
>   			reg = <0 0x14000000 0 0x1000>;
>   			#clock-cells = <1>;
> +			mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0 0x1000>;
>   		};
>   
>   		dma-controller@...01000 {
> @@ -2251,6 +2252,7 @@ vppsys1: syscon@...00000 {
>   			compatible = "mediatek,mt8195-vppsys1", "syscon";
>   			reg = <0 0x14f00000 0 0x1000>;
>   			#clock-cells = <1>;
> +			mediatek,gce-client-reg = <&gce1 SUBSYS_14f0XXXX 0 0x1000>;
>   		};
>   
>   		mutex@...01000 {
> @@ -3080,6 +3082,7 @@ vdosys0: syscon@...1a000 {
>   			reg = <0 0x1c01a000 0 0x1000>;
>   			mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
>   			#clock-cells = <1>;
> +			mediatek,gce-client-reg = <&gce0 SUBSYS_1c01XXXX 0xa000 0x1000>;
>   		};
>   
>   
> 



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