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Message-ID: <e9cc42d7-db7f-4bd8-978e-72b97cfa8d41@collabora.com>
Date: Tue, 5 Mar 2024 11:20:55 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>,
 "jassisinghbrar@...il.com" <jassisinghbrar@...il.com>,
 "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
 "chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>
Cc: "linux-mediatek@...ts.infradead.org"
 <linux-mediatek@...ts.infradead.org>,
 Singo Chang (張興國) <Singo.Chang@...iatek.com>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
 Jason-ch Chen (陳建豪)
 <Jason-ch.Chen@...iatek.com>, Shawn Sung (宋孝謙)
 <Shawn.Sung@...iatek.com>, Nancy Lin (林欣螢)
 <Nancy.Lin@...iatek.com>,
 Project_Global_Chrome_Upstream_Group
 <Project_Global_Chrome_Upstream_Group@...iatek.com>,
 "linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 5/5] mailbox: mtk-cmdq: Add support runtime get and set
 GCE event

Il 05/03/24 04:09, Jason-JH Lin (林睿祥) ha scritto:
> Hi Angelo,
> 
> Thanks for the reviews.
> 
> On Mon, 2024-03-04 at 11:06 +0100, AngeloGioacchino Del Regno wrote:
>> Il 01/03/24 12:11, Jason-JH.Lin ha scritto:
>>> ISP drivers need to get and set GCE event in their runtime contorl
>>> flow.
>>> So add these functions to support get and set GCE by CPU.
>>>
>>> Signed-off-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
>>> Change-Id: I494c34ebc5ec26c82213f2bc03d2033d60652523
>>
>> Change-Id makes no sense upstream. Please drop.
> 
> OK, I'll drop it.
> 
>>
>>> ---
>>>    drivers/mailbox/mtk-cmdq-mailbox.c       | 37
>>> ++++++++++++++++++++++++
>>>    include/linux/mailbox/mtk-cmdq-mailbox.h |  2 ++
>>>    2 files changed, 39 insertions(+)
>>>
>>> diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c
>>> b/drivers/mailbox/mtk-cmdq-mailbox.c
>>> index ead2200f39ba..d7c08249c898 100644
>>> --- a/drivers/mailbox/mtk-cmdq-mailbox.c
>>> +++ b/drivers/mailbox/mtk-cmdq-mailbox.c
>>> @@ -25,7 +25,11 @@
>>>    #define CMDQ_GCE_NUM_MAX		(2)
>>>    
>>>    #define CMDQ_CURR_IRQ_STATUS		0x10
>>> +#define CMDQ_SYNC_TOKEN_ID		0x60
>>> +#define CMDQ_SYNC_TOKEN_VALUE		0x64
>>> +#define CMDQ_TOKEN_ID_MASK			GENMASK(9, 0)
>>>    #define CMDQ_SYNC_TOKEN_UPDATE		0x68
>>> +#define CMDQ_TOKEN_UPDATE_VALUE			BIT(16)
>>>    #define CMDQ_THR_SLOT_CYCLES		0x30
>>>    #define CMDQ_THR_BASE			0x100
>>>    #define CMDQ_THR_SIZE			0x80
>>> @@ -83,6 +87,7 @@ struct cmdq {
>>>    	struct cmdq_thread	*thread;
>>>    	struct clk_bulk_data	clocks[CMDQ_GCE_NUM_MAX];
>>>    	bool			suspended;
>>> +	spinlock_t		event_lock; /* lock for gce event */
>>>    };
>>>    
>>>    struct gce_plat {
>>> @@ -113,6 +118,38 @@ u8 cmdq_get_shift_pa(struct mbox_chan *chan)
>>>    }
>>>    EXPORT_SYMBOL(cmdq_get_shift_pa);
>>>    
>>> +void cmdq_set_event(void *chan, u16 event_id)
>>> +{
>>> +	struct cmdq *cmdq = container_of(((struct mbox_chan *)chan)-
>>>> mbox,
>>> +		typeof(*cmdq), mbox);
>>
>> struct mbox_chan *mbc = chan;
>> struct cmdq *cmdq = container_of(mbc->mbox, ... etc); (and this fits
>> in one line)
>>
> OK, I'll change it.
> 
>>> +	unsigned long flags;
>>> +
>>> +	spin_lock_irqsave(&cmdq->event_lock, flags);
>>
>> Why do you need irqsave/irqrestore? I think I know, but please
>> explain.
>>
> Because ISP driver may call cmdq_get_event() first than use
> cmdq_set_event() to update the event status in one
> mtk_imgsys_setevent() function frequently.
> 
> And mtk_imgsys_setevent() will be called in SW multi-thread after cmdq
> callback from cmdq_irq_handler, so we use the spin_lock_irqsave to
> avoid the race condition.

I was imagining something like that, yes - thank you for explaining.

Cheers,
Angelo


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