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Date: Wed, 6 Mar 2024 16:01:17 +0000
From: Joshua Yeong <joshua.yeong@...rfivetech.com>
To: Frank Li <Frank.Li@....com>
CC: "alexandre.belloni@...tlin.com" <alexandre.belloni@...tlin.com>,
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<robh@...nel.org>, "zbigniew.lukwinski@...ux.intel.com"
<zbigniew.lukwinski@...ux.intel.com>
Subject: RE: [PATCH v7 5/8] i3c: target: add svc target controller support
Hi Frank,
> -----Original Message-----
> From: linux-i3c <linux-i3c-bounces@...ts.infradead.org> On Behalf Of Frank Li
> Sent: Tuesday, February 6, 2024 7:33 AM
> To: frank.li@....com
> Cc: alexandre.belloni@...tlin.com; conor.culhane@...vaco.com;
> devicetree@...r.kernel.org; gregkh@...uxfoundation.org;
> ilpo.jarvinen@...ux.intel.com; imx@...ts.linux.dev; jirislaby@...nel.org;
> joe@...ches.com; krzysztof.kozlowski+dt@...aro.org;
> krzysztof.kozlowski@...aro.org; linux-i3c@...ts.infradead.org; linux-
> kernel@...r.kernel.org; linux-serial@...r.kernel.org;
> miquel.raynal@...tlin.com; robh@...nel.org;
> zbigniew.lukwinski@...ux.intel.com
> Subject: [PATCH v7 5/8] i3c: target: add svc target controller support
>
> Add Silvaco I3C target controller support
>
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
>
> Notes:
> Change from v2 to v3
> - fix build warning
>
> drivers/i3c/master/Makefile | 2 +-
> drivers/i3c/master/svc-i3c-main.c | 35 +-
> drivers/i3c/master/svc-i3c-target.c | 776
I think putting target mode files under "master" might not make sense. We might have to
consider that we may have a "secondary master" mode. Some other ways of splitting
or handling of target mode is needed here.
..
> +
> +#define I3C_SCONFIG 0x4
> +#define I3C_SCONFIG_SLVENA_MASK BIT(0)
> +#define I3C_SCONFIG_OFFLINE_MASK BIT(9)
> +#define I3C_SCONFIG_SADDR_MASK GENMASK(31, 25)
> +
> +#define I3C_SSTATUS 0x8
> +#define I3C_SSTATUS_STNOTSTOP_MASK BIT(0)
> +#define I3C_SSTATUS_STOP_MASK BIT(10)
> +#define I3C_SSTATUS_RX_PEND_MASK BIT(11)
> +#define I3C_SSTATUS_TXNOTFULL_MASK BIT(12)
> +#define I3C_SSTATUS_DACHG_MASK BIT(13)
> +#define I3C_SSTATUS_EVDET_MASK GENMASK(21, 20)
> +#define I3C_SSTATUS_EVDET_ACKED 0x3
> +#define I3C_SSTATUS_IBIDIS_MASK BIT(24)
> +#define I3C_SSTATUS_HJDIS_MASK BIT(27)
> +
There is couple of space formatting here that requires to be fixed.
Cheers,
Joshua
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