lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240307193104.58302-1-ilkka@os.amperecomputing.com>
Date: Thu,  7 Mar 2024 11:31:04 -0800
From: Ilkka Koskinen <ilkka@...amperecomputing.com>
To: Besar Wicaksono <bwicaksono@...dia.com>,
	Robin Murphy <robin.murphy@....com>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	Will Deacon <will@...nel.org>
Cc: Mark Rutland <mark.rutland@....com>,
	Raag Jadav <raag.jadav@...el.com>,
	Ilkka Koskinen <ilkka@...amperecomputing.com>,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH] perf: arm_cspmu: Don't touch interrupt registers if no interrupt was assigned

The driver enabled and disabled interrupts even if no interrupt was
assigned to the device.

Signed-off-by: Ilkka Koskinen <ilkka@...amperecomputing.com>
---
 drivers/perf/arm_cspmu/arm_cspmu.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c
index 50b89b989ce7..2cbdb5dcb6ff 100644
--- a/drivers/perf/arm_cspmu/arm_cspmu.c
+++ b/drivers/perf/arm_cspmu/arm_cspmu.c
@@ -795,7 +795,8 @@ static void arm_cspmu_enable_counter(struct arm_cspmu *cspmu, int idx)
 	inten_off = PMINTENSET + (4 * reg_id);
 	cnten_off = PMCNTENSET + (4 * reg_id);
 
-	writel(BIT(reg_bit), cspmu->base0 + inten_off);
+	if (cspmu->irq)
+		writel(BIT(reg_bit), cspmu->base0 + inten_off);
 	writel(BIT(reg_bit), cspmu->base0 + cnten_off);
 }
 
@@ -810,7 +811,8 @@ static void arm_cspmu_disable_counter(struct arm_cspmu *cspmu, int idx)
 	cnten_off = PMCNTENCLR + (4 * reg_id);
 
 	writel(BIT(reg_bit), cspmu->base0 + cnten_off);
-	writel(BIT(reg_bit), cspmu->base0 + inten_off);
+	if (cspmu->irq)
+		writel(BIT(reg_bit), cspmu->base0 + inten_off);
 }
 
 static void arm_cspmu_event_update(struct perf_event *event)
-- 
2.40.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ