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Message-ID:
<TYCPR01MB110408BECBB6E74F5BC26E589D8272@TYCPR01MB11040.jpnprd01.prod.outlook.com>
Date: Fri, 8 Mar 2024 11:41:40 +0000
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, Jingoo Han
<jingoohan1@...il.com>, Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>, Rob Herring
<robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, Marek Vasut
<marek.vasut+renesas@...il.com>, Kishon Vijay Abraham I <kishon@...nel.org>
CC: Serge Semin <fancer.lancer@...il.com>, "linux-pci@...r.kernel.org"
<linux-pci@...r.kernel.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>, "linux-arm-msm@...r.kernel.org"
<linux-arm-msm@...r.kernel.org>, "mhi@...ts.linux.dev" <mhi@...ts.linux.dev>,
Siddharth Vadapalli <s-vadapalli@...com>, Frank Li <Frank.Li@....com>
Subject: RE: [PATCH v4 1/5] PCI: dwc: Refactor dw_pcie_edma_find_chip() API
Hello Manivannan,
> From: Manivannan Sadhasivam, Sent: Wednesday, March 6, 2024 7:22 PM
>
> In order to add support for Hyper DMA (HDMA), let's refactor the existing
> dw_pcie_edma_find_chip() API by moving the common code to separate
> functions.
>
> No functional change.
>
> Suggested-by: Serge Semin <fancer.lancer@...il.com>
> Reviewed-by: Siddharth Vadapalli <s-vadapalli@...com>
> Reviewed-by: Frank Li <Frank.Li@....com>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Thank you for the patch!
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
Best regards,
Yoshihiro Shimoda
> ---
> drivers/pci/controller/dwc/pcie-designware.c | 40 +++++++++++++++++++++++-----
> 1 file changed, 33 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 250cf7f40b85..3a26dfc5368f 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -880,7 +880,17 @@ static struct dw_edma_plat_ops dw_pcie_edma_ops = {
> .irq_vector = dw_pcie_edma_irq_vector,
> };
>
> -static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
> +static void dw_pcie_edma_init_data(struct dw_pcie *pci)
> +{
> + pci->edma.dev = pci->dev;
> +
> + if (!pci->edma.ops)
> + pci->edma.ops = &dw_pcie_edma_ops;
> +
> + pci->edma.flags |= DW_EDMA_CHIP_LOCAL;
> +}
> +
> +static int dw_pcie_edma_find_mf(struct dw_pcie *pci)
> {
> u32 val;
>
> @@ -902,8 +912,6 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
>
> if (val == 0xFFFFFFFF && pci->edma.reg_base) {
> pci->edma.mf = EDMA_MF_EDMA_UNROLL;
> -
> - val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL);
> } else if (val != 0xFFFFFFFF) {
> pci->edma.mf = EDMA_MF_EDMA_LEGACY;
>
> @@ -912,12 +920,17 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
> return -ENODEV;
> }
>
> - pci->edma.dev = pci->dev;
> + return 0;
> +}
>
> - if (!pci->edma.ops)
> - pci->edma.ops = &dw_pcie_edma_ops;
> +static int dw_pcie_edma_find_channels(struct dw_pcie *pci)
> +{
> + u32 val;
>
> - pci->edma.flags |= DW_EDMA_CHIP_LOCAL;
> + if (pci->edma.mf == EDMA_MF_EDMA_LEGACY)
> + val = dw_pcie_readl_dbi(pci, PCIE_DMA_VIEWPORT_BASE + PCIE_DMA_CTRL);
> + else
> + val = dw_pcie_readl_dma(pci, PCIE_DMA_CTRL);
>
> pci->edma.ll_wr_cnt = FIELD_GET(PCIE_DMA_NUM_WR_CHAN, val);
> pci->edma.ll_rd_cnt = FIELD_GET(PCIE_DMA_NUM_RD_CHAN, val);
> @@ -930,6 +943,19 @@ static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
> return 0;
> }
>
> +static int dw_pcie_edma_find_chip(struct dw_pcie *pci)
> +{
> + int ret;
> +
> + dw_pcie_edma_init_data(pci);
> +
> + ret = dw_pcie_edma_find_mf(pci);
> + if (ret)
> + return ret;
> +
> + return dw_pcie_edma_find_channels(pci);
> +}
> +
> static int dw_pcie_edma_irq_verify(struct dw_pcie *pci)
> {
> struct platform_device *pdev = to_platform_device(pci->dev);
>
> --
> 2.25.1
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