linux-kernel - Re: [PATCH v6 1/3] PCI: qcom: Override NO

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Message-ID: <20240310125415.GA3390@thinkpad>
Date: Sun, 10 Mar 2024 18:24:15 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Mrinmay Sarkar <quic_msarkar@...cinc.com>
Cc: andersson@...nel.org, krzysztof.kozlowski+dt@...aro.org,
	conor+dt@...nel.org, konrad.dybcio@...aro.org, robh@...nel.org,
	quic_shazhuss@...cinc.com, quic_nitegupt@...cinc.com,
	quic_ramkri@...cinc.com, quic_nayiluri@...cinc.com,
	quic_krichai@...cinc.com, quic_vbadigan@...cinc.com,
	quic_schintav@...cinc.com,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof Wilczyński <kw@...ux.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>, linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org
Subject: Re: [PATCH v6 1/3] PCI: qcom: Override NO_SNOOP attribute for
 SA8775P RC

On Wed, Mar 06, 2024 at 06:41:10PM +0530, Mrinmay Sarkar wrote:
> Due to some hardware changes, SA8775P has set the NO_SNOOP attribute
> in its TLP for all the PCIe controllers. NO_SNOOP attribute when set,
> the requester is indicating that no cache coherency issue exist for
> the addressed memory on the endpoint i.e., memory is not cached. But
> in reality, requester cannot assume this unless there is a complete
> control/visibility over the addressed memory on the endpoint.
> 
> And worst case, if the memory is cached on the endpoint, it may lead to
> memory corruption issues. It should be noted that the caching of memory
> on the endpoint is not solely dependent on the NO_SNOOP attribute in TLP.
> 
> So to avoid the corruption, this patch overrides the NO_SNOOP attribute
> by setting the PCIE_PARF_NO_SNOOP_OVERIDE register. This patch is not
> needed for other upstream supported platforms since they do not set
> NO_SNOOP attribute by default.
> 
> 8775 has IP version 1.34.0 so introduce a new cfg(cfg_1_34_0) for this
> platform. Assign override_no_snoop flag into struct qcom_pcie_cfg and
> set it true in cfg_1_34_0 and enable cache snooping if this particular
> flag is true.
> 
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@...cinc.com>

Minor nit below. With that addressed,

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>

> ---
>  drivers/pci/controller/dwc/pcie-qcom.c | 25 ++++++++++++++++++++++++-
>  1 file changed, 24 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 2ce2a3b..d4c1e69 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -51,6 +51,7 @@
>  #define PARF_SID_OFFSET				0x234
>  #define PARF_BDF_TRANSLATE_CFG			0x24c
>  #define PARF_SLV_ADDR_SPACE_SIZE		0x358
> +#define PARF_NO_SNOOP_OVERIDE			0x3d4
>  #define PARF_DEVICE_TYPE			0x1000
>  #define PARF_BDF_TO_SID_TABLE_N			0x2000
>  
> @@ -117,6 +118,10 @@
>  /* PARF_LTSSM register fields */
>  #define LTSSM_EN				BIT(8)
>  
> +/* PARF_NO_SNOOP_OVERIDE register fields */
> +#define WR_NO_SNOOP_OVERIDE_EN			BIT(1)
> +#define RD_NO_SNOOP_OVERIDE_EN			BIT(3)
> +
>  /* PARF_DEVICE_TYPE register fields */
>  #define DEVICE_TYPE_RC				0x4
>  
> @@ -227,8 +232,14 @@ struct qcom_pcie_ops {
>  	int (*config_sid)(struct qcom_pcie *pcie);
>  };
>  
> + /**
> +  * struct qcom_pcie_cfg - Per SoC config struct
> +  * @ops: qcom pcie ops structure
> +  * @override_no_snoop: Override NO_SNOOP attribute in TLP to enable cache snooping
> +  */
>  struct qcom_pcie_cfg {
>  	const struct qcom_pcie_ops *ops;
> +	bool override_no_snoop;
>  };
>  
>  struct qcom_pcie {
> @@ -961,6 +972,13 @@ static int qcom_pcie_init_2_7_0(struct qcom_pcie *pcie)
>  
>  static int qcom_pcie_post_init_2_7_0(struct qcom_pcie *pcie)
>  {
> +	const struct qcom_pcie_cfg *pcie_cfg = pcie->cfg;
> +
> +	/* Override NO_SNOOP attribute in TLP to enable cache snooping */

This comment is now redundant due to Kdoc of override_no_snoop.

- Mani

> +	if (pcie_cfg->override_no_snoop)
> +		writel(WR_NO_SNOOP_OVERIDE_EN | RD_NO_SNOOP_OVERIDE_EN,
> +				pcie->parf + PARF_NO_SNOOP_OVERIDE);
> +
>  	qcom_pcie_clear_hpc(pcie->pci);
>  
>  	return 0;
> @@ -1334,6 +1352,11 @@ static const struct qcom_pcie_cfg cfg_1_9_0 = {
>  	.ops = &ops_1_9_0,
>  };
>  
> +static const struct qcom_pcie_cfg cfg_1_34_0 = {
> +	.ops = &ops_1_9_0,
> +	.override_no_snoop = true,
> +};
> +
>  static const struct qcom_pcie_cfg cfg_2_1_0 = {
>  	.ops = &ops_2_1_0,
>  };
> @@ -1630,7 +1653,7 @@ static const struct of_device_id qcom_pcie_match[] = {
>  	{ .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 },
>  	{ .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 },
>  	{ .compatible = "qcom,pcie-sa8540p", .data = &cfg_1_9_0 },
> -	{ .compatible = "qcom,pcie-sa8775p", .data = &cfg_1_9_0},
> +	{ .compatible = "qcom,pcie-sa8775p", .data = &cfg_1_34_0},
>  	{ .compatible = "qcom,pcie-sc7280", .data = &cfg_1_9_0 },
>  	{ .compatible = "qcom,pcie-sc8180x", .data = &cfg_1_9_0 },
>  	{ .compatible = "qcom,pcie-sc8280xp", .data = &cfg_1_9_0 },
> -- 
> 2.7.4
> 

-- 
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