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Message-Id: <20240311-alpha-pll-stromer-cleanup-v1-2-f7c0c5607cca@gmail.com>
Date: Mon, 11 Mar 2024 19:45:20 +0100
From: Gabor Juhos <j4g8y7@...il.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Varadarajan Narayanan <quic_varada@...cinc.com>,
Sricharan R <quic_srichara@...cinc.com>,
Kathiravan T <quic_kathirav@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, Gabor Juhos <j4g8y7@...il.com>
Subject: [PATCH 2/2] clk: qcom: clk-alpha-pll: reorder Stromer register
offsets
The register offset arrays are ordered based on the register
offsets for all PLLs but the Stromer. For consistency, reorder
the Stromer specific array as well.
No functional changes.
Signed-off-by: Gabor Juhos <j4g8y7@...il.com>
---
drivers/clk/qcom/clk-alpha-pll.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 58ae732959803..55a77e36dc44c 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -212,9 +212,9 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
[PLL_OFF_USER_CTL] = 0x18,
[PLL_OFF_USER_CTL_U] = 0x1c,
[PLL_OFF_CONFIG_CTL] = 0x20,
+ [PLL_OFF_STATUS] = 0x28,
[PLL_OFF_TEST_CTL] = 0x30,
[PLL_OFF_TEST_CTL_U] = 0x34,
- [PLL_OFF_STATUS] = 0x28,
},
[CLK_ALPHA_PLL_TYPE_STROMER_PLUS] = {
[PLL_OFF_L_VAL] = 0x04,
--
2.44.0
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