lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240317055556.9449-1-rockrush@rockwork.org>
Date: Sun, 17 Mar 2024 13:55:56 +0800
From: Xingyou Chen <rockrush@...kwork.org>
To: linux-riscv@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org,
	ajones@...tanamicro.com,
	cleger@...osinc.com,
	aou@...s.berkeley.edu,
	palmer@...belt.com,
	paul.walmsley@...ive.com,
	Xingyou Chen <rockrush@...kwork.org>
Subject: [PATCH] riscv: typo in comment for get_f64_reg

Signed-off-by: Xingyou Chen <rockrush@...kwork.org>
---
 arch/riscv/kernel/fpu.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/fpu.S b/arch/riscv/kernel/fpu.S
index 2c543f130f93..327cf527dd7e 100644
--- a/arch/riscv/kernel/fpu.S
+++ b/arch/riscv/kernel/fpu.S
@@ -211,7 +211,7 @@ SYM_FUNC_START(put_f64_reg)
 SYM_FUNC_END(put_f64_reg)
 
 /*
- * put_f64_reg - Get a 64 bits FP register value and returned it or store it to
+ * get_f64_reg - Get a 64 bits FP register value and returned it or store it to
  *	 	 a pointer.
  * a0 = FP register index to be retrieved
  * a1 = If xlen == 32, pointer which should be loaded with the FP register value
-- 
2.43.0


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ