linux-kernel - Re: [PATCH v2 02/15] dmaengine: bcm2835: Add support for per-channel flags

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Date: Sun, 17 Mar 2024 13:55:32 +0100
From: Stefan Wahren <wahrenst@....net>
To: Andrea della Porta <andrea.porta@...e.com>, Vinod Koul
 <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Florian Fainelli <florian.fainelli@...adcom.com>, Ray Jui
 <rjui@...adcom.com>, Scott Branden <sbranden@...adcom.com>,
 Broadcom internal kernel review list
 <bcm-kernel-feedback-list@...adcom.com>, Saenz Julienne <nsaenz@...nel.org>,
 dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
 linux-rpi-kernel@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org, dave.stevenson@...pberrypi.com
Cc: Phil Elwell <phil@...pberrypi.org>, Maxime Ripard <maxime@...no.tech>,
 Dom Cobley <popcornmix@...il.com>
Subject: Re: [PATCH v2 02/15] dmaengine: bcm2835: Add support for per-channel
 flags

Hi Andrea,

Am 13.03.24 um 15:08 schrieb Andrea della Porta:
> From: Phil Elwell <phil@...pberrypi.org>
>
> Add the ability to interpret the high bits of the dreq specifier as
> flags to be included in the DMA_CS register. The motivation for this
> change is the ability to set the DISDEBUG flag for SD card transfers
> to avoid corruption when using the VPU debugger.

AFAIK this and the following 2 patches also requires modification on the
DT side. So either they must be included in the series or we better
leave them out completely. I'm not sure which one are really necessary
for 40 bit support.

Regards

>
> Signed-off-by: Phil Elwell <phil@...pberrypi.org>
> Signed-off-by: Andrea della Porta <andrea.porta@...e.com>
> ---
>   drivers/dma/bcm2835-dma.c | 10 ++++++++--
>   1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/dma/bcm2835-dma.c b/drivers/dma/bcm2835-dma.c
> index 428253b468ac..3d9973dd041d 100644
> --- a/drivers/dma/bcm2835-dma.c
> +++ b/drivers/dma/bcm2835-dma.c
> @@ -137,6 +137,10 @@ struct bcm2835_desc {
>   #define BCM2835_DMA_S_DREQ	BIT(10) /* enable SREQ for source */
>   #define BCM2835_DMA_S_IGNORE	BIT(11) /* ignore source reads - read 0 */
>   #define BCM2835_DMA_BURST_LENGTH(x) (((x) & 15) << 12)
> +#define BCM2835_DMA_CS_FLAGS(x) ((x) & (BCM2835_DMA_PRIORITY(15) | \
> +				      BCM2835_DMA_PANIC_PRIORITY(15) | \
> +				      BCM2835_DMA_WAIT_FOR_WRITES | \
> +				      BCM2835_DMA_DIS_DEBUG))
>   #define BCM2835_DMA_PER_MAP(x)	(((x) & 31) << 16) /* REQ source */
>   #define BCM2835_DMA_WAIT(x)	(((x) & 31) << 21) /* add DMA-wait cycles */
>   #define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */
> @@ -449,7 +453,8 @@ static void bcm2835_dma_start_desc(struct bcm2835_chan *c)
>   	c->desc = to_bcm2835_dma_desc(&vd->tx);
>
>   	writel(c->desc->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR);
> -	writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
> +	writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
> +	       c->chan_base + BCM2835_DMA_CS);
>   }
>
>   static irqreturn_t bcm2835_dma_callback(int irq, void *data)
> @@ -476,7 +481,8 @@ static irqreturn_t bcm2835_dma_callback(int irq, void *data)
>   	 * if this IRQ handler is threaded.) If the channel is finished, it
>   	 * will remain idle despite the ACTIVE flag being set.
>   	 */
> -	writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE,
> +	writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE |
> +	       BCM2835_DMA_CS_FLAGS(c->dreq),
>   	       c->chan_base + BCM2835_DMA_CS);
>
>   	d = c->desc;