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Message-ID: <CAMuHMdX=3HfYsrHr8Mus9NR9VEoBXh1t=RukmKdcZe=9MaHrcw@mail.gmail.com>
Date: Tue, 19 Mar 2024 09:12:07 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Jiri Slaby <jirislaby@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-serial@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v3 3/4] dt-bindings: serial: renesas,scif: Document
R9A09G057 support
Hi Prabhakar,
On Mon, Mar 18, 2024 at 6:22 PM Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Document support for the Serial Communication Interface with FIFO (SCIF)
> available in the Renesas RZ/V2H(P) (R9A09G057) SoC. The SCIF interface in
> the Renesas RZ/V2H(P) is similar to that available in the RZ/G2L
> (R9A07G044) SoC, with the only difference being that the RZ/V2H(P) SoC has
> three additional interrupts: one for Tx end/Rx ready and the other two for
> Rx and Tx buffer full, which are edge-triggered.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> v2->v3
> - Added SoC specific compat string
Thanks for the update!
> --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> @@ -79,6 +79,8 @@ properties:
> - renesas,scif-r9a08g045 # RZ/G3S
> - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
>
> + - const: renesas,scif-r9a09g057 # RZ/V2H(P)
> +
> reg:
> maxItems: 1
>
> @@ -204,6 +206,37 @@ allOf:
> - const: dri
> - const: tei
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,scif-r9a09g057
> + then:
> + properties:
> + interrupts:
> + items:
> + - description: Error interrupt
[...]
These descriptions should be at the top level. The SoC-specific rules
should just restrict the lower limit (interrupts/minItems).
> +
> + interrupt-names:
> + items:
> + - const: eri
[...]
Likewise.
In addition, you should restrict clocks/maxItems to 1, as on RZ/V2H
only the UART functional clock is supported.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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