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Message-ID: <20240320-linux-next-nand-yaml-v1-2-2d2495363e88@microchip.com>
Date: Wed, 20 Mar 2024 11:22:08 +0530
From: Balamanikandan Gunasundar <balamanikandan.gunasundar@...rochip.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>, Richard Weinberger
<richard@....at>, Vignesh Raghavendra <vigneshr@...com>, Rob Herring
<robh@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, Nicolas Ferre
<nicolas.ferre@...rochip.com>, Alexandre Belloni
<alexandre.belloni@...tlin.com>, Claudiu Beznea <claudiu.beznea@...on.dev>
CC: <linux-mtd@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
Balamanikandan Gunasundar <balamanikandan.gunasundar@...rochip.com>
Subject: [PATCH 2/3] dt-bindings: mtd: atmel-nand: add atmel pmecc
Add bindings for programmable multibit error correction code controller
(PMECC).
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@...rochip.com>
---
.../devicetree/bindings/mtd/atmel-nand.txt | 70 ----------------------
.../devicetree/bindings/mtd/atmel-pmecc.yaml | 58 ++++++++++++++++++
2 files changed, 58 insertions(+), 70 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
index e332515c499a..1934614a9298 100644
--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
@@ -1,73 +1,3 @@
-* ECC engine (PMECC) bindings:
-
-Required properties:
-- compatible: should be one of the following
- "atmel,at91sam9g45-pmecc"
- "atmel,sama5d4-pmecc"
- "atmel,sama5d2-pmecc"
- "microchip,sam9x60-pmecc"
- "microchip,sam9x7-pmecc", "atmel,at91sam9g45-pmecc"
-- reg: should contain 2 register ranges. The first one is pointing to the PMECC
- block, and the second one to the PMECC_ERRLOC block.
-
-* SAMA5 NFC I/O bindings:
-
-SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page
-operations. This interface to this logic is placed in a separate I/O range and
-should thus have its own DT node.
-
-- compatible: should be "atmel,sama5d3-nfc-io", "syscon".
-- reg: should contain the I/O range used to interact with the NFC logic.
-
-Example:
-
- nfc_io: nfc-io@...00000 {
- compatible = "atmel,sama5d3-nfc-io", "syscon";
- reg = <0x70000000 0x8000000>;
- };
-
- pmecc: ecc-engine@...fc070 {
- compatible = "atmel,at91sam9g45-pmecc";
- reg = <0xffffc070 0x490>,
- <0xffffc500 0x100>;
- };
-
- ebi: ebi@...00000 {
- compatible = "atmel,sama5d3-ebi";
- #address-cells = <2>;
- #size-cells = <1>;
- atmel,smc = <&hsmc>;
- reg = <0x10000000 0x10000000
- 0x40000000 0x30000000>;
- ranges = <0x0 0x0 0x10000000 0x10000000
- 0x1 0x0 0x40000000 0x10000000
- 0x2 0x0 0x50000000 0x10000000
- 0x3 0x0 0x60000000 0x10000000>;
- clocks = <&mck>;
-
- nand_controller: nand-controller {
- compatible = "atmel,sama5d3-nand-controller";
- atmel,nfc-sram = <&nfc_sram>;
- atmel,nfc-io = <&nfc_io>;
- ecc-engine = <&pmecc>;
- #address-cells = <2>;
- #size-cells = <1>;
- ranges;
-
- nand@3 {
- reg = <0x3 0x0 0x800000>;
- atmel,rb = <0>;
-
- /*
- * Put generic NAND/MTD properties and
- * subnodes here.
- */
- };
- };
- };
-
------------------------------------------------------------------------
-
Deprecated bindings (should not be used in new device trees):
Required properties:
diff --git a/Documentation/devicetree/bindings/mtd/atmel-pmecc.yaml b/Documentation/devicetree/bindings/mtd/atmel-pmecc.yaml
new file mode 100644
index 000000000000..872401e9dda3
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/atmel-pmecc.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/atmel-pmecc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip pmecc controller
+
+maintainers:
+ - Balamanikandan Gunasundar <balamanikandan.gunasundar@...rochip.com>
+
+description: |
+ Bindings for microchip Programmable Multibit Error Correction Code
+ Controller (PMECC). pmecc is a programmable BCH encoder/decoder. This
+ block is passed as the value to the "ecc-engine" property of microchip
+ nand flash controller node.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - atmel,at91sam9g45-pmecc
+ - atmel,sama5d2-pmecc
+ - atmel,sama5d4-pmecc
+ - microchip,sam9x60-pmecc
+ - microchip,sam9x7-pmecc
+ - items:
+ - const: microchip,sam9x60-pmecc
+ - const: atmel,at91sam9g45-pmecc
+
+ reg:
+ description:
+ The first should point to the PMECC block. The second should point to the
+ PMECC_ERRLOC block.
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: microchip,sam9x7-pmecc
+ then:
+ properties:
+ clocks:
+ description:
+ The clock source for pmecc controller
+ maxItems: 1
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ pmecc: ecc-engine@...fc070 {
+ compatible = "microchip,sam9x7-pmecc";
+ reg = <0xffffe000 0x300>,
+ <0xffffe600 0x100>;
+ clocks = <&pmc 2 48>;
+ };
--
2.25.1
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