lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZgFukaLXo4DNwfEK@hovoldconsulting.com>
Date: Mon, 25 Mar 2024 13:31:13 +0100
From: Johan Hovold <johan@...nel.org>
To: Krishna Kurapati <quic_kriskura@...cinc.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Rob Herring <robh+dt@...nel.org>,
	Bjorn Andersson <andersson@...nel.org>,
	Wesley Cheng <quic_wcheng@...cinc.com>,
	Konrad Dybcio <konrad.dybcio@...aro.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
	Felipe Balbi <balbi@...nel.org>, devicetree@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, linux-usb@...r.kernel.org,
	linux-kernel@...r.kernel.org, quic_ppratap@...cinc.com,
	quic_jackp@...cinc.com
Subject: Re: [PATCH v16 2/9] usb: dwc3: core: Access XHCI address space
 temporarily to read port info

On Thu, Mar 07, 2024 at 11:50:45AM +0530, Krishna Kurapati wrote:
> All DWC3 Multi Port controllers that exist today only support host mode.
> Temporarily map XHCI address space for host-only controllers and parse
> XHCI Extended Capabilities registers to read number of usb2 ports and
> usb3 ports present on multiport controller. Each USB Port is at least HS
> capable.
> 
> The port info for usb2 and usb3 phy are identified as num_usb2_ports
> and num_usb3_ports. The intention is as follows:
> 
> Wherever we need to perform phy operations like:
> 
> LOOP_OVER_NUMBER_OF_AVAILABLE_PORTS()
> {
> 	phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST);
> 	phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST);
> }
> 
> If number of usb2 ports is 3, loop can go from index 0-2 for
> usb2_generic_phy. If number of usb3-ports is 2, we don't know for sure,
> if the first 2 ports are SS capable or some other ports like (2 and 3)
> are SS capable. So instead, num_usb2_ports is used to loop around all
> phy's (both hs and ss) for performing phy operations. If any
> usb3_generic_phy turns out to be NULL, phy operation just bails out.
> num_usb3_ports is used to modify GUSB3PIPECTL registers while setting up
> phy's as we need to know how many SS capable ports are there for this.
> 
> Signed-off-by: Krishna Kurapati <quic_kriskura@...cinc.com>

Reviewed-by: Johan Hovold <johan+linaro@...nel.org>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ