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Date: Tue, 2 Apr 2024 17:21:28 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: quic_fenglinw@...cinc.com, kernel@...cinc.com,
 Andy Gross <agross@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
 Dmitry Torokhov <dmitry.torokhov@...il.com>, Rob Herring
 <robh+dt@...nel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@...aro.org>,
 Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-input@...r.kernel.org,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v8 1/3] input: pm8xxx-vibrator: refactor to support new
 SPMI vibrator

On 1.04.2024 10:38 AM, Fenglin Wu via B4 Relay wrote:
> From: Fenglin Wu <quic_fenglinw@...cinc.com>
> 
> Currently, vibrator control register addresses are hard coded,
> including the base address and offsets, it's not flexible to
> support new SPMI vibrator module which is usually included in
> different PMICs with different base address. Refactor it by using
> the base address defined in devicetree.
> 
> Signed-off-by: Fenglin Wu <quic_fenglinw@...cinc.com>
> ---

[...]

>  	if (regs->enable_mask)
> -		rc = regmap_update_bits(vib->regmap, regs->enable_addr,
> +		rc = regmap_update_bits(vib->regmap, vib->enable_addr,
>  					regs->enable_mask, on ? ~0 : 0);

The idiomatic way across the kernel seems to be writing the mask value
instead of ~0 (which also saves like 2 cpu instructions)


Not sure about how ssbi addressing works, but except for that lgtm

Konrad

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