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Message-ID: <db301b10-6312-4d47-ba4a-9c462e5cbea0@quicinc.com>
Date: Wed, 3 Apr 2024 13:29:46 +0800
From: Fenglin Wu <quic_fenglinw@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@...aro.org>, <kernel@...cinc.com>,
        Andy Gross
	<agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Dmitry Torokhov
	<dmitry.torokhov@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        "Krzysztof
 Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
        Dmitry Baryshkov
	<dmitry.baryshkov@...aro.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-input@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH v8 1/3] input: pm8xxx-vibrator: refactor to support new
 SPMI vibrator



On 4/2/2024 11:21 PM, Konrad Dybcio wrote:
> On 1.04.2024 10:38 AM, Fenglin Wu via B4 Relay wrote:
>> From: Fenglin Wu <quic_fenglinw@...cinc.com>
>>
>> Currently, vibrator control register addresses are hard coded,
>> including the base address and offsets, it's not flexible to
>> support new SPMI vibrator module which is usually included in
>> different PMICs with different base address. Refactor it by using
>> the base address defined in devicetree.
>>
>> Signed-off-by: Fenglin Wu <quic_fenglinw@...cinc.com>
>> ---
> 
> [...]
> 
>>   	if (regs->enable_mask)
>> -		rc = regmap_update_bits(vib->regmap, regs->enable_addr,
>> +		rc = regmap_update_bits(vib->regmap, vib->enable_addr,
>>   					regs->enable_mask, on ? ~0 : 0);
> 
> The idiomatic way across the kernel seems to be writing the mask value
> instead of ~0 (which also saves like 2 cpu instructions)
> 
> 
> Not sure about how ssbi addressing works, but except for that lgtm
> 
Agree.
SSBI driver doesn't provide reg_update_bits function call so similar 
mathematics is done on the value before writing to the register,  I can 
update it to use enable_mask directly in next version.

> Konrad

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