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Date: Tue, 2 Apr 2024 23:55:49 +0530
From: Ajit Pandey <quic_ajipan@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC: Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd
	<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konrad.dybcio@...aro.org>,
        Vinod Koul <vkoul@...nel.org>,
        Vladimir Zapolskiy
	<vladimir.zapolskiy@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, Taniya Das
	<quic_tdas@...cinc.com>,
        Jagadeesh Kona <quic_jkona@...cinc.com>,
        Imran Shaik
	<quic_imrashai@...cinc.com>,
        Satya Priya Kakitapalli
	<quic_skakitap@...cinc.com>
Subject: Re: [PATCH 7/7] clk: qcom: Add GPUCC driver support for SM4450



On 3/31/2024 7:09 AM, Dmitry Baryshkov wrote:
> On Sat, 30 Mar 2024 at 20:30, Ajit Pandey <quic_ajipan@...cinc.com> wrote:
>>
>> Add Graphics Clock Controller (GPUCC) support for SM4450 platform.
>>
>> Signed-off-by: Ajit Pandey <quic_ajipan@...cinc.com>
>> ---
>>   drivers/clk/qcom/Kconfig        |   9 +
>>   drivers/clk/qcom/Makefile       |   1 +
>>   drivers/clk/qcom/gpucc-sm4450.c | 806 ++++++++++++++++++++++++++++++++
>>   3 files changed, 816 insertions(+)
>>   create mode 100644 drivers/clk/qcom/gpucc-sm4450.c
>>
> 
> [skipped]
> 
>> +static int gpu_cc_sm4450_probe(struct platform_device *pdev)
>> +{
>> +       struct regmap *regmap;
>> +
>> +       regmap = qcom_cc_map(pdev, &gpu_cc_sm4450_desc);
>> +       if (IS_ERR(regmap))
>> +               return PTR_ERR(regmap);
>> +
>> +       clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
>> +       clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
>> +
>> +       /* Keep some clocks always enabled */
>> +       qcom_branch_set_clk_en(regmap, 0x93a4); /* GPU_CC_CB_CLK */
>> +       qcom_branch_set_clk_en(regmap, 0x9004); /* GPU_CC_CXO_AON_CLK */
>> +       qcom_branch_set_clk_en(regmap, 0x900c); /* GPU_CC_DEMET_CLK */
> 
> Why? At least other drivers model these three clocks properly.
>
These clocks are POR on in SM4450 and required to be kept always enabled 
for GPU functionality hence keep them enabled from probe only.

>> +
>> +       return qcom_cc_really_probe(pdev, &gpu_cc_sm4450_desc, regmap);
>> +}
>> +
>> +static struct platform_driver gpu_cc_sm4450_driver = {
>> +       .probe = gpu_cc_sm4450_probe,
>> +       .driver = {
>> +               .name = "gpucc-sm4450",
>> +               .of_match_table = gpu_cc_sm4450_match_table,
>> +       },
>> +};
>> +
>> +module_platform_driver(gpu_cc_sm4450_driver);
>> +
>> +MODULE_DESCRIPTION("QTI GPUCC SM4450 Driver");
>> +MODULE_LICENSE("GPL");
>> --
>> 2.25.1
>>
>>
> 
> 

-- 
Thanks, and Regards
Ajit

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