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Message-ID: <1a6fccd3-452c-423f-b73e-cef5f9d01633@linaro.org>
Date: Wed, 3 Apr 2024 09:09:15 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Varadarajan Narayanan <quic_varada@...cinc.com>, andersson@...nel.org,
 konrad.dybcio@...aro.org, mturquette@...libre.com, sboyd@...nel.org,
 robh@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
 djakov@...nel.org, dmitry.baryshkov@...aro.org, quic_anusha@...cinc.com,
 linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-pm@...r.kernel.org
Subject: Re: [PATCH v6 1/6] dt-bindings: interconnect: Add Qualcomm IPQ9574
 support

On 02/04/2024 12:34, Varadarajan Narayanan wrote:
> +#define ICC_NSSNOC_NSSCC	10
> +#define ICC_NSSNOC_SNOC_0	11
> +#define ICC_NSSNOC_SNOC_1	12
> +#define ICC_NSSNOC_PCNOC_1	13
> +#define ICC_NSSNOC_QOSGEN_REF	14
> +#define ICC_NSSNOC_TIMEOUT_REF	15
> +#define ICC_NSSNOC_XO_DCD	16
> +#define ICC_NSSNOC_ATB		17
> +#define ICC_MEM_NOC_NSSNOC	18
> +#define ICC_NSSNOC_MEMNOC	19
> +#define ICC_NSSNOC_MEM_NOC_1	20
> +
> +#define ICC_NSSNOC_PPE		0
> +#define ICC_NSSNOC_PPE_CFG	1
> +#define ICC_NSSNOC_NSS_CSR	2
> +#define ICC_NSSNOC_IMEM_QSB	3
> +#define ICC_NSSNOC_IMEM_AHB	4
> +
> +#define MASTER(x)	((ICC_ ## x) * 2)
> +#define SLAVE(x)	(MASTER(x) + 1)

You already received comment to make your bindings consistent with other
Qualcomm bindings. Now you repeat the same mistake.

No, that is neither consistent nor greppble.


Best regards,
Krzysztof


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