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Message-ID: <391a874522a4141b4bc7f0314a9e50d27142123a.camel@linaro.org>
Date: Fri, 05 Apr 2024 08:38:41 +0100
From: André Draszik <andre.draszik@...aro.org>
To: Peter Griffin <peter.griffin@...aro.org>, mturquette@...libre.com, 
 sboyd@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
  vkoul@...nel.org, kishon@...nel.org, alim.akhtar@...sung.com,
 avri.altman@....com,  bvanassche@....org, s.nawrocki@...sung.com,
 cw00.choi@...sung.com,  jejb@...ux.ibm.com, martin.petersen@...cle.com,
 chanho61.park@...sung.com,  ebiggers@...nel.org
Cc: linux-scsi@...r.kernel.org, linux-phy@...ts.infradead.org, 
	devicetree@...r.kernel.org, linux-clk@...r.kernel.org, 
	linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, tudor.ambarus@...aro.org, 
	saravanak@...gle.com, willmcvicker@...gle.com
Subject: Re: [PATCH 05/17] arm64: dts: exynos: gs101: enable cmu-hsi2 clock
 controller

On Thu, 2024-04-04 at 13:25 +0100, Peter Griffin wrote:
> Enable the cmu_hsi2 clock management unit. It feeds some of
> the high speed interfaces such as PCIe and UFS.
> 
> Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
> ---
>  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index eddb6b326fde..38ac4fb1397e 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -1253,6 +1253,18 @@ pinctrl_hsi1: pinctrl@...40000 {
>  			interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>;
>  		};
>  
> +		cmu_hsi2: clock-controller@...00000 {
> +			compatible = "google,gs101-cmu-hsi2";
> +			reg = <0x14400000 0x4000>;
> +			#clock-cells = <1>;
> +			clocks = <&ext_24_5m>,
> +				 <&cmu_top CLK_DOUT_CMU_HSI2_BUS>,
> +				 <&cmu_top CLK_DOUT_CMU_HSI2_PCIE>,
> +				 <&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
> +				 <&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
> +			clock-names = "oscclk", "bus", "pcie", "ufs_embd", "mmc_card";
> +		};

This doesn't build because you didn't add the clock ids in the binding patch.

Other than that,

Reviewed-by: André Draszik <andre.draszik@...aro.org>

> +
>  		pinctrl_hsi2: pinctrl@...40000 {
>  			compatible = "google,gs101-pinctrl";
>  			reg = <0x14440000 0x00001000>;


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