linux-kernel - Re: [PATCH v6] x86/mm: Don't disable INVLPG if "incomplete Global INVLPG flushes" is fixed by microcode or the kernel is running in a hypervisor

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Date: Thu, 11 Apr 2024 08:18:52 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Xi Ruoyao <xry111@...111.site>, Dave Hansen
 <dave.hansen@...ux.intel.com>, Michael Kelley <mhklinux@...look.com>,
 Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Cc: Andy Lutomirski <luto@...nel.org>, Peter Zijlstra <peterz@...radead.org>,
 Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
 Borislav Petkov <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>,
 x86@...nel.org, linux-kernel@...r.kernel.org,
 Sean Christopherson <seanjc@...gle.com>,
 Andrew Cooper <andrew.cooper3@...rix.com>
Subject: Re: [PATCH v6] x86/mm: Don't disable INVLPG if "incomplete Global
 INVLPG flushes" is fixed by microcode or the kernel is running in a
 hypervisor

On 4/11/24 07:48, Xi Ruoyao wrote:
> On Thu, 2024-04-11 at 07:44 -0700, Dave Hansen wrote:
>> On 4/11/24 03:48, Xi Ruoyao wrote:
>>> +	/*
>>> +	 * The Intel errata claims: "this erratum does not apply in VMX
>>> +	 * non-root operation.  It applies only when PCIDs are enabled
>>> +	 * and either in VMX root operation or outside VMX operation."
>>> +	 * So we are safe if we are surely running in a hypervisor.
>>> +	 */
>> When you revise this, could you please work to make this more succinct?
>> The Intel language on these things tends to be a bit flowery and is not
>> always well-suited for the kernel.
> Oops, bad timing.  I just sent v7 before getting this reply.

One way to avoid bad timing like this is to wait more than 4 hours
between patch revisions.

> I'm not a native English speaker, so could you give some hint about how
> to write this comment clearly?

Something like this would be fine:

	/* Only bare-metal is affected.  PCIDs in guests are OK. */