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Message-ID: <2494f1ea-efa2-4c72-ae7d-1c363eb1fb2d@intel.com>
Date: Mon, 15 Apr 2024 15:58:32 -0700
From: "Chang S. Bae" <chang.seok.bae@...el.com>
To: Eric Biggers <ebiggers@...nel.org>
CC: <linux-kernel@...r.kernel.org>, <linux-crypto@...r.kernel.org>,
<dm-devel@...hat.com>, <luto@...nel.org>, <dave.hansen@...ux.intel.com>,
<tglx@...utronix.de>, <bp@...en8.de>, <mingo@...nel.org>, <x86@...nel.org>,
<herbert@...dor.apana.org.au>, <ardb@...nel.org>, <elliott@....com>,
<dan.j.williams@...el.com>, <bernie.keany@...el.com>,
<charishma1.gairuboyina@...el.com>
Subject: Re: [PATCH v9 00/14] x86: Support Key Locker
On 4/15/2024 3:54 PM, Eric Biggers wrote:
>
> Sure, you could still use VEX-coded 128-bit instructions for everything other
> than the actual AES (for example, the XTS tweak computation) though, right?
> They're a bit more convenient to work with since they are non-destructive.
Right.
Thanks,
Chang
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