linux-kernel - Re: [PATCH] clk: rs9: fix wrong default value for clock amplitude

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Message-ID: <128516ff-f499-4784-b899-841e7e5a9ec1@leica-geosystems.com>
Date: Mon, 15 Apr 2024 12:44:02 +0000
From: POPESCU Catalin <catalin.popescu@...ca-geosystems.com>
To: "marex@...x.de" <marex@...x.de>, "sboyd@...nel.org" <sboyd@...nel.org>,
	"mturquette@...libre.com" <mturquette@...libre.com>,
	"biju.das.jz@...renesas.com" <biju.das.jz@...renesas.com>,
	"marek.vasut+renesas@...lbox.org" <marek.vasut+renesas@...lbox.org>
CC: "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	GEO-CHHER-bsp-development <bsp-development.geo@...ca-geosystems.com>,
	"m.felsch@...gutronix.de" <m.felsch@...gutronix.de>
Subject: Re: [PATCH] clk: rs9: fix wrong default value for clock amplitude

I'm sorry, I forgot to add v2 in the title.

On 15/04/2024 14:42, Catalin Popescu wrote:
> According to 9FGV0241, 9FGV0441 & 9FGV0841 datasheets, the default
> value for the clock amplitude is 0.8V, while the driver assumes 0.7V.
>
> Additionally, define constants for default values for both clock
> amplitude and spread spectrum and use them.
>
> Fixes: 892e0ddea1aa ("clk: rs9: Add Renesas 9-series PCIe clock generator driver")
>
> Signed-off-by: Catalin Popescu <catalin.popescu@...ca-geosystems.com>
> ---
> Changes in v2:
>   - update commit message with "9FGV0841", document change about spread
>     spectrum and add Fixes tag.
> ---
>   drivers/clk/clk-renesas-pcie.c | 10 ++++++----
>   1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/clk-renesas-pcie.c b/drivers/clk/clk-renesas-pcie.c
> index 53e21ac302e6..4c3a5e4eb77a 100644
> --- a/drivers/clk/clk-renesas-pcie.c
> +++ b/drivers/clk/clk-renesas-pcie.c
> @@ -25,10 +25,12 @@
>   #define RS9_REG_SS_AMP_0V7			0x1
>   #define RS9_REG_SS_AMP_0V8			0x2
>   #define RS9_REG_SS_AMP_0V9			0x3
> +#define RS9_REG_SS_AMP_DEFAULT			RS9_REG_SS_AMP_0V8
>   #define RS9_REG_SS_AMP_MASK			0x3
>   #define RS9_REG_SS_SSC_100			0
>   #define RS9_REG_SS_SSC_M025			(1 << 3)
>   #define RS9_REG_SS_SSC_M050			(3 << 3)
> +#define RS9_REG_SS_SSC_DEFAULT			RS9_REG_SS_SSC_100
>   #define RS9_REG_SS_SSC_MASK			(3 << 3)
>   #define RS9_REG_SS_SSC_LOCK			BIT(5)
>   #define RS9_REG_SR				0x2
> @@ -205,8 +207,8 @@ static int rs9_get_common_config(struct rs9_driver_data *rs9)
>   	int ret;
>   
>   	/* Set defaults */
> -	rs9->pll_amplitude = RS9_REG_SS_AMP_0V7;
> -	rs9->pll_ssc = RS9_REG_SS_SSC_100;
> +	rs9->pll_amplitude = RS9_REG_SS_AMP_DEFAULT;
> +	rs9->pll_ssc = RS9_REG_SS_SSC_DEFAULT;
>   
>   	/* Output clock amplitude */
>   	ret = of_property_read_u32(np, "renesas,out-amplitude-microvolt",
> @@ -247,13 +249,13 @@ static void rs9_update_config(struct rs9_driver_data *rs9)
>   	int i;
>   
>   	/* If amplitude is non-default, update it. */
> -	if (rs9->pll_amplitude != RS9_REG_SS_AMP_0V7) {
> +	if (rs9->pll_amplitude != RS9_REG_SS_AMP_DEFAULT) {
>   		regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_AMP_MASK,
>   				   rs9->pll_amplitude);
>   	}
>   
>   	/* If SSC is non-default, update it. */
> -	if (rs9->pll_ssc != RS9_REG_SS_SSC_100) {
> +	if (rs9->pll_ssc != RS9_REG_SS_SSC_DEFAULT) {
>   		regmap_update_bits(rs9->regmap, RS9_REG_SS, RS9_REG_SS_SSC_MASK,
>   				   rs9->pll_ssc);
>   	}
>
> base-commit: 6bd343537461b57f3efe5dfc5fc193a232dfef1e
> prerequisite-patch-id: 0000000000000000000000000000000000000000