linux-kernel - Re: [PATCH v8 2/2] x86/mm: Don't disable PCID if the kernel is running on a hypervisor

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Tue, 16 Apr 2024 16:49:42 -0700
From: Sean Christopherson <seanjc@...gle.com>
To: Xi Ruoyao <xry111@...111.site>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>, Michael Kelley <mhklinux@...look.com>, 
	Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>, Andy Lutomirski <luto@...nel.org>, 
	Peter Zijlstra <peterz@...radead.org>, Thomas Gleixner <tglx@...utronix.de>, 
	Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>, x86@...nel.org, 
	linux-kernel@...r.kernel.org, Andrew Cooper <andrew.cooper3@...rix.com>
Subject: Re: [PATCH v8 2/2] x86/mm: Don't disable PCID if the kernel is
 running on a hypervisor

On Sat, Apr 13, 2024, Xi Ruoyao wrote:
> The Intel erratum for "incomplete Global INVLPG flushes" says:
> 
>     This erratum does not apply in VMX non-root operation. It applies
>     only when PCIDs are enabled and either in VMX root operation or
>     outside VMX operation.
> 
> So if the kernel is running in a hypervisor, we are in VMX non-root
> operation and we should be safe to use PCID.
> 
> Cc: Dave Hansen <dave.hansen@...ux.intel.com>
> Cc: Michael Kelley <mhklinux@...look.com>
> Cc: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
> Cc: Sean Christopherson <seanjc@...gle.com>
> Cc: Andrew Cooper <andrew.cooper3@...rix.com>
> Link: https://lore.kernel.org/all/168436059559.404.13934972543631851306.tip-bot2@tip-bot2/
> Link: https://cdrdv2.intel.com/v1/dl/getContent/740518 # RPL042, rev. 13
> Link: https://cdrdv2.intel.com/v1/dl/getContent/682436 # ADL063, rev. 24
> Signed-off-by: Xi Ruoyao <xry111@...111.site>
> ---
>  arch/x86/mm/init.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
> index c318cdc35467..6010f86c5acd 100644
> --- a/arch/x86/mm/init.c
> +++ b/arch/x86/mm/init.c
> @@ -275,6 +275,14 @@ static void __init probe_page_size_mask(void)
>   * microcode is not updated to fix the issue.
>   */
>  static const struct x86_cpu_id invlpg_miss_ids[] = {
> +	/* Only bare-metal is affected.  PCIDs in guests are OK.  */
> +	{
> +	  .vendor	= X86_VENDOR_INTEL,
> +	  .family	= 6,
> +	  .model	= INTEL_FAM6_ANY,
> +	  .feature	= X86_FEATURE_HYPERVISOR,

Isn't this inverted?  x86_match_cpu() will return NULL if the CPU doesn't have
HYPERVISOR.  We want it to return NULL if the CPU *does* have HYPERVISOR.

> +	  .driver_data	= 0,
> +	},
>  	INTEL_MATCH(INTEL_FAM6_ALDERLAKE,	0x2e),
>  	INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L,	0x42c),
>  	INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT,	0x11),
> -- 
> 2.44.0
>