linux-kernel - Re: [PATCH v8 2/2] x86/mm: Don't disable PCID if the kernel is running on a hypervisor

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Message-ID: <a4c72d6722189c074bd46f01d95c9aaa966a2687.camel@xry111.site>
Date: Wed, 17 Apr 2024 16:01:55 +0800
From: Xi Ruoyao <xry111@...111.site>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>, Michael Kelley
	 <mhklinux@...look.com>, Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>, 
 Andy Lutomirski
	 <luto@...nel.org>, Peter Zijlstra <peterz@...radead.org>, Thomas Gleixner
	 <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, Borislav Petkov
	 <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>, x86@...nel.org, 
	linux-kernel@...r.kernel.org, Andrew Cooper <andrew.cooper3@...rix.com>
Subject: Re: [PATCH v8 2/2] x86/mm: Don't disable PCID if the kernel is
 running on a hypervisor

On Tue, 2024-04-16 at 16:49 -0700, Sean Christopherson wrote:
> On Sat, Apr 13, 2024, Xi Ruoyao wrote:
> > The Intel erratum for "incomplete Global INVLPG flushes" says:
> > 
> >     This erratum does not apply in VMX non-root operation. It applies
> >     only when PCIDs are enabled and either in VMX root operation or
> >     outside VMX operation.
> > 
> > So if the kernel is running in a hypervisor, we are in VMX non-root
> > operation and we should be safe to use PCID.
> > 
> > Cc: Dave Hansen <dave.hansen@...ux.intel.com>
> > Cc: Michael Kelley <mhklinux@...look.com>
> > Cc: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
> > Cc: Sean Christopherson <seanjc@...gle.com>
> > Cc: Andrew Cooper <andrew.cooper3@...rix.com>
> > Link: https://lore.kernel.org/all/168436059559.404.13934972543631851306tip-bot2@tip-bot2/
> > Link: https://cdrdv2.intel.com/v1/dl/getContent/740518 # RPL042, rev. 13
> > Link: https://cdrdv2.intel.com/v1/dl/getContent/682436 # ADL063, rev. 24
> > Signed-off-by: Xi Ruoyao <xry111@...111.site>
> > ---
> >  arch/x86/mm/init.c | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
> > index c318cdc35467..6010f86c5acd 100644
> > --- a/arch/x86/mm/init.c
> > +++ b/arch/x86/mm/init.c
> > @@ -275,6 +275,14 @@ static void __init probe_page_size_mask(void)
> >   * microcode is not updated to fix the issue.
> >   */
> >  static const struct x86_cpu_id invlpg_miss_ids[] = {
> > +	/* Only bare-metal is affected.  PCIDs in guests are OK.  */
> > +	{
> > +	  .vendor	= X86_VENDOR_INTEL,
> > +	  .family	= 6,
> > +	  .model	= INTEL_FAM6_ANY,
> > +	  .feature	= X86_FEATURE_HYPERVISOR,
> 
> Isn't this inverted?  x86_match_cpu() will return NULL if the CPU doesn't have
> HYPERVISOR.  We want it to return NULL if the CPU *does* have HYPERVISOR.

Hmm, but it seems not possible to let x86_match_cpu() to always return
NULL if the CPU does have HYPERVISOR.  If I read x86_match_cpu()
correctly it cannot do an inverted feature match.  Or am I
misunderstanding something here?

Instead this makes x86_match_cpu() return an entry with driver_data = 0
if the CPU have HYPERVISOR, thus boot_cpu_data.microcode <
invlpg_miss_match->driver_data will always be false when the CPU have
HYPERVISOR and PCID won't be disabled.

> > +	  .driver_data	= 0,
> > +	},
> >  	INTEL_MATCH(INTEL_FAM6_ALDERLAKE,	0x2e),
> >  	INTEL_MATCH(INTEL_FAM6_ALDERLAKE_L,	0x42c),
> >  	INTEL_MATCH(INTEL_FAM6_ATOM_GRACEMONT,	0x11),
> > -- 
> > 2.44.0
> > 

-- 
Xi Ruoyao <xry111@...111.site>
School of Aerospace Science and Technology, Xidian University