linux-kernel - Re: [PATCH 00/17] HSI2, UFS & UFS phy support for Tensor GS101

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Message-ID: <CADrjBPoVSvUoq4Yw6DWRXN6=xi31p6=UKCL=57VHDoaKiQCTEQ@mail.gmail.com>
Date: Tue, 16 Apr 2024 11:29:15 +0100
From: Peter Griffin <peter.griffin@...aro.org>
To: Alim Akhtar <alim.akhtar@...sung.com>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, vkoul@...nel.org, kishon@...nel.org, 
	avri.altman@....com, bvanassche@....org, s.nawrocki@...sung.com, 
	cw00.choi@...sung.com, jejb@...ux.ibm.com, martin.petersen@...cle.com, 
	chanho61.park@...sung.com, ebiggers@...nel.org, linux-scsi@...r.kernel.org, 
	linux-phy@...ts.infradead.org, devicetree@...r.kernel.org, 
	linux-clk@...r.kernel.org, linux-samsung-soc@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	tudor.ambarus@...aro.org, andre.draszik@...aro.org, saravanak@...gle.com, 
	willmcvicker@...gle.com
Subject: Re: [PATCH 00/17] HSI2, UFS & UFS phy support for Tensor GS101

Hi Alim,

Thanks for your review feedback.

On Mon, 8 Apr 2024 at 09:30, Alim Akhtar <alim.akhtar@...sung.com> wrote:
>
> Hi Peter
>
> > -----Original Message-----
> > From: Peter Griffin <peter.griffin@...aro.org>
> > Sent: Thursday, April 4, 2024 5:56 PM
> > To: mturquette@...libre.com; sboyd@...nel.org; robh@...nel.org;
> > krzk+dt@...nel.org; conor+dt@...nel.org; vkoul@...nel.org;
> > kishon@...nel.org; alim.akhtar@...sung.com; avri.altman@....com;
> > bvanassche@....org; s.nawrocki@...sung.com; cw00.choi@...sung.com;
> > jejb@...ux.ibm.com; martin.petersen@...cle.com;
> > chanho61.park@...sung.com; ebiggers@...nel.org
> > Cc: linux-scsi@...r.kernel.org; linux-phy@...ts.infradead.org;
> > devicetree@...r.kernel.org; linux-clk@...r.kernel.org; linux-samsung-
> > soc@...r.kernel.org; linux-kernel@...r.kernel.org; linux-arm-
> > kernel@...ts.infradead.org; tudor.ambarus@...aro.org;
> > andre.draszik@...aro.org; saravanak@...gle.com;
> > willmcvicker@...gle.com; Peter Griffin <peter.griffin@...aro.org>
> > Subject: [PATCH 00/17] HSI2, UFS & UFS phy support for Tensor GS101
> >
> > Hi folks,
> >
> >
> > Question
> > ========
> >
> > Currently the link comes up in Gear 3 due to ufshcd_init_host_params()
> > host_params initialisation. If I update that to use UFS_HS_G4 for
> negotiation
> > then the link come up in Gear 4. I propose (in a future patch) to use VER
> > register offset 0x8 to determine whether to set G4 capability or not (if
> major
> > version is >= 3).
> >
> > The bitfield of VER register in gs101 docs is
> >
> > RSVD [31:16] Reserved
> > MJR [15:8] Major version number
> > MNR [7:4] Minor version number
> > VS [3:0] Version Suffix
> >
> > Can anyone confirm if other Exynos platforms supported by this driver have
> > the same register, and if it conforms to the bitfield described above?
> >
>
> VER (offset 0x8) is standard UFS HCI spec, so all vendor need to have this
> (unless something really wrong with the HW)
> Yes, Exynos and FSD SoC has these bitfield implemented.

Thanks for confirming! I will look to propose something once this
series is merged.

Peter.