lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <4e7023aa-64df-454b-8fb3-cd02fc600865@linux.intel.com>
Date: Wed, 17 Apr 2024 11:23:11 -0700
From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
 tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, dave.hansen@...el.com
Cc: hpa@...or.com, seanjc@...gle.com, elena.reshetova@...el.com,
 rick.p.edgecombe@...el.com, x86@...nel.org, linux-kernel@...r.kernel.org,
 Tom Lendacky <thomas.lendacky@....com>, Chris Oo <cho@...rosoft.com>,
 Dexuan Cui <decui@...rosoft.com>
Subject: Re: [PATCH] x86/tdx: Preserve shared bit on mprotect()


On 4/12/24 12:12 PM, Kirill A. Shutemov wrote:
> The TDX guest platform takes one bit from the physical address to
> indicate if the page is shared (accessible by VMM). This bit is not part
> of the physical_mask and is not preserved during mprotect(). As a
> result, the 'shared' bit is lost during mprotect() on shared mappings.
>
> _COMMON_PAGE_CHG_MASK specifies which PTE bits need to be preserved
> during modification. AMD includes 'sme_me_mask' in the define to
> preserve the 'encrypt' bit.
>
> To cover both Intel and AMD cases, include 'cc_mask' in
> _COMMON_PAGE_CHG_MASK instead of 'sme_me_mask'.
>
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
> Fixes: 41394e33f3a0 ("x86/tdx: Extend the confidential computing API to support TDX guests")
> Cc: Tom Lendacky <thomas.lendacky@....com>
> Cc: Chris Oo <cho@...rosoft.com>
> Cc: Dexuan Cui <decui@...rosoft.com>
> ---

Looks good to me.

Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>

>  arch/x86/include/asm/pgtable_types.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
> index 3f648ffdfbe5..7dd2fdfacff3 100644
> --- a/arch/x86/include/asm/pgtable_types.h
> +++ b/arch/x86/include/asm/pgtable_types.h
> @@ -148,7 +148,7 @@
>  #define _COMMON_PAGE_CHG_MASK	(PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |	\
>  				 _PAGE_SPECIAL | _PAGE_ACCESSED |	\
>  				 _PAGE_DIRTY_BITS | _PAGE_SOFT_DIRTY |	\
> -				 _PAGE_DEVMAP | _PAGE_ENC | _PAGE_UFFD_WP)
> +				 _PAGE_DEVMAP | _PAGE_CC | _PAGE_UFFD_WP)
>  #define _PAGE_CHG_MASK	(_COMMON_PAGE_CHG_MASK | _PAGE_PAT)
>  #define _HPAGE_CHG_MASK (_COMMON_PAGE_CHG_MASK | _PAGE_PSE | _PAGE_PAT_LARGE)
>  
> @@ -173,6 +173,7 @@ enum page_cache_mode {
>  };
>  #endif
>  
> +#define _PAGE_CC		(_AT(pteval_t, cc_mask))
>  #define _PAGE_ENC		(_AT(pteval_t, sme_me_mask))
>  
>  #define _PAGE_CACHE_MASK	(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)

-- 
Sathyanarayanan Kuppuswamy
Linux Kernel Developer


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ