linux-kernel - Re: [PATCH net-next v3 5/5] ARM: dts: r9a06g032: describe GMAC1

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Date: Thu, 18 Apr 2024 11:48:29 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Romain Gantois <romain.gantois@...tlin.com>
Cc: "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, 
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, 
	Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>, 
	Alexandre Torgue <alexandre.torgue@...s.st.com>, Jose Abreu <joabreu@...opsys.com>, 
	Maxime Coquelin <mcoquelin.stm32@...il.com>, Russell King <linux@...linux.org.uk>, 
	Clément Léger <clement.leger@...tlin.com>, 
	Thomas Petazzoni <thomas.petazzoni@...tlin.com>, netdev@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-renesas-soc@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com, 
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH net-next v3 5/5] ARM: dts: r9a06g032: describe GMAC1

Hi Romain,

On Mon, Apr 15, 2024 at 11:18 AM Romain Gantois
<romain.gantois@...tlin.com> wrote:
> From: Clément Léger <clement.leger@...tlin.com>
>
> The r9a06g032 SoC of the RZ/N1 family features two GMAC devices named
> GMAC1/2, that are based on Synopsys cores. GMAC1 is connected to a
> RGMII/RMII converter that is already described in this device tree.
>
> Signed-off-by: "Clément Léger" <clement.leger@...tlin.com>
> [rgantois: commit log]
> Signed-off-by: Romain Gantois <romain.gantois@...tlin.com>

Thanks for your patch!

> --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> @@ -316,6 +316,25 @@ dma1: dma-controller@...05000 {
>                         data-width = <8>;
>                 };
>
> +               gmac1: ethernet@...00000 {
> +                       compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
> +                       reg = <0x44000000 0x2000>;
> +                       interrupt-parent = <&gic>;

The surrounding "soc" node already specifies the interrupt parent,
so there is no need to repeat that. I could fix that while applying
to renesas-devel for v6.10, but it looks like there will be a v4 for
the rest of the series anyway?

The rest LGTM, so with the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>

> +                       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> +                       clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
> +                       clock-names = "stmmaceth";
> +                       power-domains = <&sysctrl>;
> +                       snps,multicast-filter-bins = <256>;
> +                       snps,perfect-filter-entries = <128>;
> +                       tx-fifo-depth = <2048>;
> +                       rx-fifo-depth = <4096>;
> +                       pcs-handle = <&mii_conv1>;
> +                       status = "disabled";
> +               };
> +
>                 gmac2: ethernet@...02000 {
>                         compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
>                         reg = <0x44002000 0x2000>;
>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68korg

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds