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Message-ID: <jwjrnxboz2cdkkrufxhpvxhueqdvswil3ffn47wo4gwmt3r3tz@jm6cduxcd6my>
Date: Sat, 20 Apr 2024 13:05:07 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Michael Turquette <mturquette@...libre.com>, 
	Stephen Boyd <sboyd@...nel.org>, Konrad Dybcio <konrad.dybcio@...ainline.org>, 
	Konrad Dybcio <konrad.dybcio@...aro.org>, Neil Armstrong <neil.armstrong@...aro.org>, 
	linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] clk: qcom: dispcc: fix DisplayPort link clocks

On Mon, Apr 08, 2024 at 02:47:03PM +0300, Dmitry Baryshkov wrote:
> On several Qualcomm platforms DisplayPort link clocks used incorrect
> frequency tables. Drop frequency tables and use clk_byte2_ops instead of
> clk_rcg2_ops.
> 
> Note, this was tested on SM8450 only and then extended to other
> platforms.
> 

As Stephen points out, it seems from the commit messages that this just
cleans up the code because it's wrong. But both Luca and Neil points out
that it resolves a visible issue/error.

Can we please have this (the actual problem being resolved) captured in
the commit messages?

Regards,
Bjorn

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> Dmitry Baryshkov (4):
>       clk: qcom: dispcc-sm8450: fix DisplayPort clocks
>       clk: qcom: dispcc-sm6350: fix DisplayPort clocks
>       clk: qcom: dispcc-sm8550: fix DisplayPort clocks
>       clk: qcom: dispcc-sm8650: fix DisplayPort clocks
> 
>  drivers/clk/qcom/dispcc-sm6350.c | 11 +----------
>  drivers/clk/qcom/dispcc-sm8450.c | 20 ++++----------------
>  drivers/clk/qcom/dispcc-sm8550.c | 20 ++++----------------
>  drivers/clk/qcom/dispcc-sm8650.c | 20 ++++----------------
>  4 files changed, 13 insertions(+), 58 deletions(-)
> ---
> base-commit: 8568bb2ccc278f344e6ac44af6ed010a90aa88dc
> change-id: 20240408-dispcc-dp-clocks-5ee5d5926346
> 
> Best regards,
> -- 
> Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> 

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