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Message-ID: <6f7355f6-ae84-4246-83ad-3450e036b111@amd.com>
Date: Tue, 23 Apr 2024 08:15:42 +0200
From: Michal Simek <michal.simek@....com>
To: Sean Anderson <sean.anderson@...ux.dev>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof WilczyƄski <kw@...ux.com>,
 Rob Herring <robh@...nel.org>, linux-pci@...r.kernel.org,
 "Gogada, Bharat Kumar" <bharat.kumar.gogada@....com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
 Thippeswamy Havalige <thippeswamy.havalige@....com>,
 Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH 7/7] [RFT] arm64: zynqmp: Add PCIe phys

Hi Bharat,

On 4/22/24 21:59, Sean Anderson wrote:
> Add PCIe phy bindings for the ZCU102.
> 
> Signed-off-by: Sean Anderson <sean.anderson@...ux.dev>
> ---
> I don't have a ZCU102, so please test this.
> 
>   arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> index ad8f23a0ec67..68fe53685351 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> @@ -941,6 +941,8 @@ conf-pull-none {
>   
>   &pcie {
>   	status = "okay";
> +	phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>;
> +	phy-names = "pcie-phy0";
>   };
>   
>   &psgtr {

Please review and test this series.

Thanks,
Michal

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