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Message-ID: <6fcfe1bb-a1e9-4d7c-aff7-e572bcdf5d31@samsung.com>
Date: Thu, 25 Apr 2024 11:18:58 +0200
From: Marek Szyprowski <m.szyprowski@...sung.com>
To: Adam Ford <aford173@...il.com>, dri-devel@...ts.freedesktop.org
Cc: marex@...x.de, aford@...conembedded.com, Frieder Schrempf
<frieder.schrempf@...tron.de>, Inki Dae <inki.dae@...sung.com>, Jagan Teki
<jagan@...rulasolutions.com>, Andrzej Hajda <andrzej.hajda@...el.com>, Neil
Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>, Jonas Karlman
<jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>, Maarten
Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard
<mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, David Airlie
<airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>, Marco Felsch
<m.felsch@...gutronix.de>, Michael Tretter <m.tretter@...gutronix.de>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 2/2] drm/bridge: samsung-dsim: Fix porch
calcalcuation rounding
On 12.02.2024 00:09, Adam Ford wrote:
> When using video sync pulses, the HFP, HBP, and HSA are divided between
> the available lanes if there is more than one lane. For certain
> timings and lane configurations, the HFP may not be evenly divisible.
> If the HFP is rounded down, it ends up being too small which can cause
> some monitors to not sync properly. In these instances, adjust htotal
> and hsync to round the HFP up, and recalculate the htotal.
>
> Tested-by: Frieder Schrempf <frieder.schrempf@...tron.de> # Kontron BL i.MX8MM with HDMI monitor
> Signed-off-by: Adam Ford <aford173@...il.com>
Tested-by: Marek Szyprowski <m.szyprowski@...sung.com>
> ---
> V2: No changes
>
> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> index 8476650c477c..52939211fe93 100644
> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> @@ -1606,6 +1606,27 @@ static int samsung_dsim_atomic_check(struct drm_bridge *bridge,
> adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
> }
>
> + /*
> + * When using video sync pulses, the HFP, HBP, and HSA are divided between
> + * the available lanes if there is more than one lane. For certain
> + * timings and lane configurations, the HFP may not be evenly divisible.
> + * If the HFP is rounded down, it ends up being too small which can cause
> + * some monitors to not sync properly. In these instances, adjust htotal
> + * and hsync to round the HFP up, and recalculate the htotal. Through trial
> + * and error, it appears that the HBP and HSA do not appearto need the same
> + * correction that HFP does.
> + */
> + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE && dsi->lanes > 1) {
> + int hfp = adjusted_mode->hsync_start - adjusted_mode->hdisplay;
> + int remainder = hfp % dsi->lanes;
> +
> + if (remainder) {
> + adjusted_mode->hsync_start += remainder;
> + adjusted_mode->hsync_end += remainder;
> + adjusted_mode->htotal += remainder;
> + }
> + }
> +
> return 0;
> }
>
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
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