linux-kernel - [PATCH 3/3] spi: spi-microchip-core: Fix the number of chip selects supported

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Date: Thu, 2 May 2024 15:34:10 +0100
From: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
To: Mark Brown <broonie@...nel.org>
CC: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	<linux-riscv@...ts.infradead.org>, <linux-spi@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>, Conor Dooley
	<conor.dooley@...rochip.com>, Daire McNamara <daire.mcnamara@...rochip.com>,
	<valentina.fernandezalanis@...rochip.com>, Prajna Rajendra Kumar
	<prajna.rajendrakumar@...rochip.com>
Subject: [PATCH 3/3] spi: spi-microchip-core: Fix the number of chip selects supported

The SPI controller in PolarFire SoC has multiple chip selects, but only
one is wired up in the MSS. Therefore, fix the driver to chose one
chip select.

Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
---
 drivers/spi/spi-microchip-core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-microchip-core.c b/drivers/spi/spi-microchip-core.c
index 71886c27bca3..4289dfba9af5 100644
--- a/drivers/spi/spi-microchip-core.c
+++ b/drivers/spi/spi-microchip-core.c
@@ -21,7 +21,7 @@
 #include <linux/spi/spi.h>
 
 #define MAX_LEN				(0xffff)
-#define MAX_CS				(8)
+#define MAX_CS				(1)
 #define DEFAULT_FRAMESIZE		(8)
 #define FIFO_DEPTH			(32)
 #define CLK_GEN_MODE1_MAX		(255)
-- 
2.25.1