linux-kernel - [PATCH 0/3] Add support for GPIO based CS

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Message-ID: <20240502143410.12629-1-prajna.rajendrakumar@microchip.com>
Date: Thu, 2 May 2024 15:34:07 +0100
From: Prajna Rajendra Kumar <prajna.rajendrakumar@...rochip.com>
To: Mark Brown <broonie@...nel.org>
CC: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	<linux-riscv@...ts.infradead.org>, <linux-spi@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>, Conor Dooley
	<conor.dooley@...rochip.com>, Daire McNamara <daire.mcnamara@...rochip.com>,
	<valentina.fernandezalanis@...rochip.com>, Prajna Rajendra Kumar
	<prajna.rajendrakumar@...rochip.com>
Subject: [PATCH 0/3] Add support for GPIO based CS

The Microchip PolarFire SoC SPI controller supports multiple 
chip selects. However, only one chip select is connected in the MSS. 
Therefore, use GPIO descriptors to configure additional chip select 
lines.

Prajna Rajendra Kumar (3):
  spi: spi-microchip-core: Add support for GPIO based CS
  spi: dt-bindings: Add num-cs property for mpfs-spi
  spi: spi-microchip-core: Fix the number of chip selects supported

 .../bindings/spi/microchip,mpfs-spi.yaml      | 19 ++++++++++++++++---
 drivers/spi/spi-microchip-core.c              |  6 +++++-
 2 files changed, 21 insertions(+), 4 deletions(-)

-- 
2.25.1