| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <CAMhs-H_x85BXw0z+gRpS84UT3OCcaewtP7cDq4SVD4YWyeUcRw@mail.gmail.com>
Date: Fri, 3 May 2024 11:42:37 +0200
From: Sergio Paracuellos <sergio.paracuellos@...il.com>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc: linux-pci@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>, Rob Herring <robh@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>, Linus Walleij <linus.walleij@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH 07/10] PCI: Replace PCI_CONF1{,_EXT}_ADDRESS() with the
new helpers
Hi,
On Mon, Apr 29, 2024 at 12:47 PM Ilpo Järvinen
<ilpo.jarvinen@...ux.intel.com> wrote:
>
> Replace the old PCI_CONF1{,_EXT}_ADDRESS() helpers used to calculate
> PCI Configuration Space Type 1 addresses with the new
> pci_conf1{,_ext}_offset() helpers that are more generic and more widely
> available.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
> ---
> drivers/pci/controller/pci-ftpci100.c | 6 ++----
> drivers/pci/controller/pci-ixp4xx.c | 5 ++---
> drivers/pci/controller/pcie-mt7621.c | 7 +++----
> drivers/pci/pci.h | 8 --------
> 4 files changed, 7 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/pci/controller/pci-ftpci100.c b/drivers/pci/controller/pci-ftpci100.c
> index ffdeed25e961..a8d0217a0b94 100644
> --- a/drivers/pci/controller/pci-ftpci100.c
> +++ b/drivers/pci/controller/pci-ftpci100.c
> @@ -182,8 +182,7 @@ static int faraday_raw_pci_read_config(struct faraday_pci *p, int bus_number,
> unsigned int fn, int config, int size,
> u32 *value)
> {
> - writel(PCI_CONF1_ADDRESS(bus_number, PCI_SLOT(fn),
> - PCI_FUNC(fn), config),
> + writel(pci_conf1_addr(bus_number, fn, config, true),
> p->base + FTPCI_CONFIG);
>
> *value = readl(p->base + FTPCI_DATA);
> @@ -214,8 +213,7 @@ static int faraday_raw_pci_write_config(struct faraday_pci *p, int bus_number,
> {
> int ret = PCIBIOS_SUCCESSFUL;
>
> - writel(PCI_CONF1_ADDRESS(bus_number, PCI_SLOT(fn),
> - PCI_FUNC(fn), config),
> + writel(pci_conf1_addr(bus_number, fn, config, true),
> p->base + FTPCI_CONFIG);
>
> switch (size) {
> diff --git a/drivers/pci/controller/pci-ixp4xx.c b/drivers/pci/controller/pci-ixp4xx.c
> index ec0125344ca1..fd52f4a3ef31 100644
> --- a/drivers/pci/controller/pci-ixp4xx.c
> +++ b/drivers/pci/controller/pci-ixp4xx.c
> @@ -192,9 +192,8 @@ static u32 ixp4xx_config_addr(u8 bus_num, u16 devfn, int where)
> BIT(32 - PCI_SLOT(devfn));
> } else {
> /* type 1 */
> - return (PCI_CONF1_ADDRESS(bus_num, PCI_SLOT(devfn),
> - PCI_FUNC(devfn), where) &
> - ~PCI_CONF1_ENABLE) | PCI_CONF1_TRANSACTION;
> + return pci_conf1_addr(bus_num, devfn, where, false) |
> + PCI_CONF1_TRANSACTION;
> }
> }
>
> diff --git a/drivers/pci/controller/pcie-mt7621.c b/drivers/pci/controller/pcie-mt7621.c
> index 79e225edb42a..2b2d9828a910 100644
> --- a/drivers/pci/controller/pcie-mt7621.c
> +++ b/drivers/pci/controller/pcie-mt7621.c
> @@ -127,8 +127,7 @@ static void __iomem *mt7621_pcie_map_bus(struct pci_bus *bus,
> unsigned int devfn, int where)
> {
> struct mt7621_pcie *pcie = bus->sysdata;
> - u32 address = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
> - PCI_FUNC(devfn), where);
> + u32 address = pci_conf1_ext_addr(bus->number, devfn, where, true);
>
> writel_relaxed(address, pcie->base + RALINK_PCI_CONFIG_ADDR);
>
> @@ -143,7 +142,7 @@ static struct pci_ops mt7621_pcie_ops = {
>
> static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
> {
> - u32 address = PCI_CONF1_EXT_ADDRESS(0, dev, 0, reg);
> + u32 address = pci_conf1_ext_addr(0, PCI_DEVFN(dev, 0), reg, true);
>
> pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
> return pcie_read(pcie, RALINK_PCI_CONFIG_DATA);
> @@ -152,7 +151,7 @@ static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
> static void write_config(struct mt7621_pcie *pcie, unsigned int dev,
> u32 reg, u32 val)
> {
> - u32 address = PCI_CONF1_EXT_ADDRESS(0, dev, 0, reg);
> + u32 address = pci_conf1_ext_addr(0, PCI_DEVFN(dev, 0), reg, true);
>
> pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
> pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA);
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index cf0530a60105..fdf9624b0b12 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -833,12 +833,4 @@ struct pci_devres {
>
> struct pci_devres *find_pci_dr(struct pci_dev *pdev);
>
> -#define PCI_CONF1_ADDRESS(bus, dev, func, reg) \
> - (PCI_CONF1_ENABLE | \
> - pci_conf1_addr(bus, PCI_DEVFN(dev, func), reg & ~0x3U))
> -
> -#define PCI_CONF1_EXT_ADDRESS(bus, dev, func, reg) \
> - (PCI_CONF1_ENABLE | \
> - pci_conf1_ext_addr(bus, PCI_DEVFN(dev, func), reg & ~0x3U))
> -
> #endif /* DRIVERS_PCI_H */
> --
> 2.39.2
>
I have tested in a GnuBee v1 board based on mt7621 and all PCI
enumeration and so on is working properly. Hence, for MT7621:
Acked-by: Sergio Paracuellos <sergio.paracuellos@...il.com>
Tested-by: Sergio Paracuellos <sergio.paracuellos@...il.com>
Thanks,
Sergio Paracuellos
Powered by blists - more mailing lists